Hi, I change the omx size to 376M,and i change the serverplatform.xs to this:
var TI816X_DSP_ExtMemMap = {
DDR3_HOST: {
comment: "DDR3 Memory reserved for use by the A8",
name: "DDR3_HOST",
base: 0x80000000,
len: 0x12C00000
},
DDR3_DSP: {
comment: "DDR3 Memory reserved for use by the C674",
name: "DDR3_DSP",
base: 0x99500000,
len: 0x00C00000
},
DDRALGHEAP: {
comment: "DDR3 Memory reserved for use by algorithms on the C674",
name: "DDRALGHEAP",
base: 0x98000000,
len: 0x01400000
},
DDR3_SR1: {
comment: "DDR3 Memory reserved for use by SharedRegion 1",
name: "DDR3_SR1",
base: 0x9a100000,
len: 0x00100000
},
DDR3_HDVPSS: {
comment: "DDR3 Memory reserved for use by HDVPSS",
name: "DDR3_HDVPSS",
base: 0xBF900000,
len: 0x00200000
},
DDR3_V4L2: {
comment: "DDR3 Memory reserved for use by V4L2",
name: "DDR3_V4L2",
base: 0xBFB00000,
len: 0x00200000
},
DDR3_SR0: {
comment: "DDR3 Memory reserved for use by SharedRegion 0",
name: "DDR3_SR0",
base: 0x9f700000,
len: 0x00200000
},
DDR3_M3: {
comment: "DDR3 Memory reserved for use by the M3 core",
name: "DDR3_M3",
base: 0x9CF00000,
len: 0x00E00000
},
};
var TI816X_VIDEOM3_ExtMemMap = {
DDR3_HOST: {
comment: "DDR3 Memory reserved for use by the A8",
name: "DDR3_HOST",
base: 0x80000000,
len: 0x12C00000
},
DDR3_DSP: {
comment: "DDR3 Memory reserved for use by the C674",
name: "DDR3_DSP",
base: 0x99500000,
len: 0x00C00000
},
DDR3_SR1: {
comment: "DDR3 Memory reserved for use by SharedRegion 1",
name: "DDR3_SR1",
base: 0x9A100000,
len: 0x00100000
},
DDR3_HDVPSS: {
comment: "DDR3 Memory reserved for use by HDVPSS",
name: "DDR3_HDVPSS",
base: 0xBF900000,
len: 0x00200000
},
DDR3_V4L2: {
comment: "DDR3 Memory reserved for use by V4L2",
name: "DDR3_V4L2",
base: 0xBFB00000,
len: 0x00200000 /* 2 MB */
},
DDR3_SR0: {
comment: "DDR3 Memory reserved for use by SharedRegion 0",
name: "DDR3_SR0",
base: 0x9F700000,
len: 0x00200000
},
DDR3_M3: {
comment: "DDR3 Memory reserved for use by the M3 core",
name: "DDR3_M3",
base: 0x9CF00000,
len: 0x00E00000
},
DDRALGHEAP: {
comment: "DDR3 Memory reserved for use by algorithms on the M3",
name: "DDRALGHEAP",
base: 0x9BD00000,
len: 0x01200000
},
};
var TI816X_VPSSM3_ExtMemMap = {
DDR3_HOST: {
comment: "DDR3 Memory reserved for use by the A8",
name: "DDR3_HOST",
base: 0x80000000,
len: 0x12C00000
},
DDR3_DSP: {
comment: "DDR3 Memory reserved for use by the C674",
name: "DDR3_DSP",
base: 0x99500000,
len: 0x00C00000
},
DDR3_SR1: {
comment: "DDR3 Memory reserved for use by SharedRegion 1",
name: "DDR3_SR1",
base: 0x9A100000,
len: 0x00100000
},
DDR3_HDVPSS: {
comment: "DDR3 Memory reserved for use by HDVPSS",
name: "DDR3_HDVPSS",
base: 0xBF900000,
len: 0x00200000 /* 2 MB */
},
DDR3_V4L2: {
comment: "DDR3 Memory reserved for use by V4L2",
name: "DDR3_V4L2",
base: 0xBFB00000,
len: 0x00200000 /* 2 MB */
},
DDR3_SR0: {
comment: "DDR3 Memory reserved for use by SharedRegion 0",
name: "DDR3_SR0",
base: 0x9F700000,
len: 0x00200000
},
DDR3_M3: {
comment: "DDR3 Memory reserved for use by the M3 core",
name: "DDR3_M3",
base: 0x9CF00000,
len: 0x00E00000
},
DDRALGHEAP: {
comment: "DDR3 Memory reserved for use by algorithms on the M3",
name: "DDRALGHEAP",
base: 0x9A200000,
len: 0x01B00000
},
};
but I do not sure that it is right .such as DDR3_M3 and DDRALGHEAP.there are three argument ,I do not know how to use it. and what problem could happen.
Thanks