thanke you everyone
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Hi,
You need to modify the CM_PER_GPIO2_CLKCTRL register accordingly.
To enable GPIO2 module functional clock, you need to set: CM_PER_GPIO2_CLKCTRL[1:0]MODULEMODE = 0x2 - ENABLE : Module is explicitly enabled. Interface clock (if not used for functions) may be gated according to the clock domain state. Functional clocks are guarantied to stay present. As long as in this configuration, power domain sleep transition cannot happen.
To enable the GPIO2_GDBGCLK, you need to set CM_PER_GPIO2_CLKCTRL[18]OPTFCLKEN_GPIO_2_GDBCLK = 0x1 - FCLK_EN : Optional functional clock is enabled.
CM_PER_GPIO_CLCTRL register's physical address is: 0x44E000B0.
Best Regards,
Yordan