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Memory Allocation Guidelines?

Guru 15580 points

Are there published guidelines for where to allocate the various memory sections of the C5515? I am struggling to squeeze all of my code into available memory and specifically wonder if it is OK to put .const and .bss into SARAM? When I do this, things start getting a bit squirrely.

Below is the allocation that worked until my code got too large to fit.

.bss : > DARAM
vectors : > VEC ALIGN = 256
.stack : > DARAM
.sysstack : > DARAM
.sysmem : > DARAM
.text : > SARAM
.data : > DARAM 
.cinit : > SARAM
.const : > DARAM
.cio : > SARAM
.switch : > DARAM

  • There is a defailt .cmd file included with CCS. Here is what I have in C:\ti\ccsv6\ccs_base\c5500\include

    /****************************************************************************/
    /* C5515.cmd */
    /* Copyright (c) 2012 Texas Instruments Incorporated */
    /* Author: Rafael de Souza */
    /* */
    /* Description: This file is a sample linker command file that can be */
    /* used for linking programs built with the C compiler and */
    /* running the resulting .out file on a C5515. */
    /* Use it as a guideline. You will want to */
    /* change the memory layout to match your specific */
    /* target system. You may want to change the allocation */
    /* scheme according to the size of your program. */
    /* */
    /****************************************************************************/

    MEMORY
    {
    MMR: o = 0x000000 l = 0x0000c0 /* 192B Memory Mapped Registers */
    DARAM0: o = 0x0000C0 l = 0x001F40 /* 8kB Dual Access RAM 0 */
    DARAM1: o = 0x002000 l = 0x002000 /* 8kB Dual Access RAM 1 */
    DARAM2: o = 0x004000 l = 0x002000 /* 8kB Dual Access RAM 2 */
    DARAM3: o = 0x006000 l = 0x002000 /* 8kB Dual Access RAM 3 */
    DARAM4: o = 0x008000 l = 0x002000 /* 8kB Dual Access RAM 4 */
    DARAM5: o = 0x00A000 l = 0x002000 /* 8kB Dual Access RAM 5 */
    DARAM6: o = 0x00C000 l = 0x002000 /* 8kB Dual Access RAM 6 */
    DARAM7: o = 0x00E000 l = 0x002000 /* 8kB Dual Access RAM 7 */

    SARAM0: o = 0x010000 l = 0x002000 /* 8kB Single Access RAM 0 */
    SARAM1: o = 0x012000 l = 0x002000 /* 8kB Single Access RAM 1 */
    SARAM2: o = 0x014000 l = 0x002000 /* 8kB Single Access RAM 2 */
    SARAM3: o = 0x016000 l = 0x002000 /* 8kB Single Access RAM 3 */
    SARAM4: o = 0x018000 l = 0x002000 /* 8kB Single Access RAM 4 */
    SARAM5: o = 0x01A000 l = 0x002000 /* 8kB Single Access RAM 5 */
    SARAM6: o = 0x01C000 l = 0x002000 /* 8kB Single Access RAM 6 */
    SARAM7: o = 0x01E000 l = 0x002000 /* 8kB Single Access RAM 7 */
    SARAM8: o = 0x020000 l = 0x002000 /* 8kB Single Access RAM 8 */
    SARAM9: o = 0x022000 l = 0x002000 /* 8kB Single Access RAM 9 */
    SARAM10: o = 0x024000 l = 0x002000 /* 8kB Single Access RAM 10 */
    SARAM11: o = 0x026000 l = 0x002000 /* 8kB Single Access RAM 11 */
    SARAM12: o = 0x028000 l = 0x002000 /* 8kB Single Access RAM 12 */
    SARAM13: o = 0x02A000 l = 0x002000 /* 8kB Single Access RAM 13 */
    SARAM14: o = 0x02C000 l = 0x002000 /* 8kB Single Access RAM 14 */
    SARAM15: o = 0x02E000 l = 0x002000 /* 8kB Single Access RAM 15 */
    SARAM16: o = 0x030000 l = 0x002000 /* 8kB Single Access RAM 16 */
    SARAM17: o = 0x032000 l = 0x002000 /* 8kB Single Access RAM 17 */
    SARAM18: o = 0x034000 l = 0x002000 /* 8kB Single Access RAM 18 */
    SARAM19: o = 0x036000 l = 0x002000 /* 8kB Single Access RAM 19 */
    SARAM20: o = 0x038000 l = 0x002000 /* 8kB Single Access RAM 20 */
    SARAM21: o = 0x03A000 l = 0x002000 /* 8kB Single Access RAM 21 */
    SARAM22: o = 0x03C000 l = 0x002000 /* 8kB Single Access RAM 22 */
    SARAM23: o = 0x03E000 l = 0x002000 /* 8kB Single Access RAM 23 */
    SARAM24: o = 0x040000 l = 0x002000 /* 8kB Single Access RAM 24 */
    SARAM25: o = 0x042000 l = 0x002000 /* 8kB Single Access RAM 25 */
    SARAM26: o = 0x044000 l = 0x002000 /* 8kB Single Access RAM 26 */
    SARAM27: o = 0x046000 l = 0x002000 /* 8kB Single Access RAM 27 */
    SARAM28: o = 0x048000 l = 0x002000 /* 8kB Single Access RAM 28 */
    SARAM29: o = 0x04A000 l = 0x002000 /* 8kB Single Access RAM 29 */
    SARAM30: o = 0x04C000 l = 0x002000 /* 8kB Single Access RAM 30 */
    SARAM31: o = 0x04E000 l = 0x002000 /* 8kB Single Access RAM 31 */

    CS0: o = 0x050000 l = 0x7B0000 /* 8MB CS0 external memory space */
    CS2: o = 0x800000 l = 0x400000 /* 4MB CS2 external memory space */
    CS3: o = 0xC00000 l = 0x200000 /* 2MB CS3 external memory space */
    CS4: o = 0xE00000 l = 0x100000 /* 1MB CS4 external memory space */
    CS5: o = 0xF00000 l = 0x0E0000 /* 1MB CS5 external memory space */
    ROM: o = 0xFE0000 l = 0x01FF00 /* 128kB ROM (MPNMC=0) or CS5 (MPNMC=1) */
    VECS: o = 0xFFFF00 l = 0x000100 /* reset vector */
    }

    SECTIONS
    {
    vectors (NOLOAD) > VECS /* If MPNMC = 1, remove the NOLOAD directive */
    .cinit > DARAM0
    .text > DARAM1
    .stack > DARAM0
    .sysstack > DARAM0
    .sysmem > DARAM4
    .data > DARAM4
    .cio > DARAM0
    .bss > DARAM5
    .const > DARAM0
    }
  • Thanks Serge. I have the default template, which is where I began. As you can see, everything in the template is run from DARAM. But I need to move things around a bit. What I am looking for is some information on the issues involved, if any, with running .const or .bss from SARAM vs DARAM.
  • Hi Mike,

    You can refer to TMS320C55x Assembly Language Tools userguide - SPRU280I - Chapter 9.

    Regards

     Vasanth

  • Vasanth,
    Could you be a bit more specific? Where in the manual does it address my question of the DARAM vs SARAM placement issues?
  • Hi Mike,

    I do not think we have a specific document which mentions about memory allocation, its application dependent.

    What I was referring to was for .const can be placed in slow memory unless this is being heavily utilized.

    DARAM is high performance memory and needs to be effectively utilized. It depends on the application code, if there exists requirement (wrt performance) then .const can be placed in DARAM section otherwise placing in SARAM looks fine.

    Regards

    Vasanth

  • Vasanth,

    Thank you for the clarification.