GPMC read exception on DM8148

Hi Miao,

miao yu1 said:

I am trying to use GPMC for DSP to communicate with the FPGA. 

Are you using MMU between DSP C674x and GPMC module? Have a look in DM814x silicon errata, Advisory 3.0.25

System MMU Bypass - GPMC Accessibility Limitations
In order for the DSP to access GPMC directly, the System MMU must be used to remap the GPMC physical address range to a different virtual address. Therefore, Workaround 1 cannot be used and also support direct DSP access to the GPMC addresses. If Workaround 1 is desired, then the DSP can access the GPMC via indirect means, such as by submitting an EDMA request to access the GPMC. Alternatively, Workaround 2 can be used.
The reason for this limitation is that the DSP views virtual addresses between 0x00000000 and 0x10FFFFFF as local addresses (mapped to DSP L1D, L1P, L2, and control registers). The L3 interconnect maps a part of GPMC addresses to the same range. In order for the DSP to directly access GPMC, the DEMMU must be used to remap a chosen virtual address (say 0x2000 0000) to the GPMC physical address of 0x00000000.

Check also that you are aligned with the DM814x TRM, sections:

11.2.4.10.2 Synchronous Access Description
11.2.4.10.2.1 Synchronous Single Read
11.3.6.1.2 Synchronous NOR Flash Timing Parameters Formulas



See if the below links will be in help:

Regards,
Pavel

Hi Pavel,

Thanks for your patience and these threads. According to your explanations, I need to designate the memory map through MMU which tells DSP by which way to access the memory because of the overlap between local addresses (0x00000000~0x10FFFFFF ) and virtual ones such as 0x01000000. But I do as follows:

1. Since addresses (0x01000000~0x1FFFFFFF) are for GPMC,  I create a new platform file which allocates address 0x18000000 as the base one of GPMC for accessing to FPGA. I think the 128MB size (0x18000000 ~0x1FFFFFFF) I designate is not important.

2. Use this platform in my CCS project. Allocate 'fpga_mem' segment in above memory in new created .cmd file and the integer value 'gpmc_start ' in this segment using 'DATA_SECTION(gpmc_start , ".fpga_mem")' in my source file. Get the value's address and use the pointer.

3. Configure the corresponding registers. GPMC_CONFIG7_1 is configured as 0x00000818 in order to conform to the above values.

My questions are:

1. Accidentally, the 0x18000000 address doesn't locate in the DSP's local address. Need I use MMU? If I use the addresses outside of the address range used by DSP, how does DSP handle this? I remember but not clearly that the DSP will process correctly if I want to access some address such as 0x48xxxxxx which is in L4.

2. Is it the wrong address that causes this problem? But why is the read operation wrong? I think the writing operation should be wrong, too.

3. I notice that the allocated addresses for code or data in the RTSC platform are all beyond 0x10000000.  Does it have relation with the 'internal global address' which ranges from 0x10000000 to 0x10FFFFFF?

Looking forward to your reply.

BR,

Miao

Pavel,

I don't quite understand what you have said.

1. I am using BIOS system, so do I need not to use MMU?

2. The overlap part between addresses (0x11000000~0xFFFFFFFF) which are for DEMMU in DSP and the ones for GPMC(0x00000000~0x1FFFFFFF) is from 0x11000000 to 0x1FFFFFFF. Is this the reason why GPMC is at 0x11000000 to 0x1FFFFFFF if I don't use MMU in DSP?

Operations at 0x11000000 to 0x1FFFFFFF in DSP fail again.
In order to simplify the question, I try in A8 ARM without kernels. I need not to consider the overlap of the addressing places. But I can read and write correctly only with the addresses chosen as 0x08000000, 0x10000000 or 0x18000000. The values of the highest two bits can be divisible by 8. Is it accidental?
Where do I fail?

BR,

Miao

Hi Pavel,
I have found my mistake. I thought the base address and region size( determined by mask field) are independent with each other, however, the region size determines the chosen base address. Thanks for your patience!

BR,
Miao