AM335x SRAM + OCMC vs. cache usability question

utelia

Hi,

Reading SPRUH73K.pdf, I haven't been able to figure out whether SRAM is always there or is it turned to L1 cache when cache is enabled? (Like they do in C6000).

Thus, do I always have both the IRAM/SRAM and OCMC SRAM available, also when enabling cache?

Thanks! The answer is probably obvious, I just cannot make this certain by myself.

over 11 years ago

0 Biser Gatchev-XID over 11 years ago

TI__Guru**** 393215 points

Hi,

Please check the memory map in section 2.1 of the AM335X TRM Rev. L. There are two 64kB SRAM segments. One of them (SRAM Internal) can be alternatively used as SRAM or L1 cache, the other (L3 OCMC0) is always available.

0 utelia over 11 years ago in reply to Biser Gatchev-XID

Intellectual 290 points

Thanks for a quick answer. This was my assumption as well, just couldn't find it clearly spelled out in the spec.

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AM335x SRAM + OCMC vs. cache usability question