Our design normally is allowing external devices to assert hold and the C6713 assert HOLDA.
Periodically the C6713 must have control of the EMIF bus.
What happens to HOLDA if it was '0' (C6713 had already acknowledged a hold from an external device) and the C6713 tries to write a '1' to assert NOHOLD of the GBLCTL?
Thank You,
Tony
Anthony,
You should never do this. The result is not defined, which means we cannot tell you exactly what is going to happen, but it can be bad. Please refer to the section in the EMIF User Guide:
Proper operation is to use an external arbitrator that monitors the C6713's BUSREQn output to see when the C6713 needs to access the bus, then allow that to happen as soon as possible. This all depends on the system requirements and the other bus masters that will be accessing the same EMIF signals. There may be some application notes you can find on TI.com or some training material archived on the TI Wiki Pages.
Regards,
RandyP
