I'm modifying one of my designs that uses the C6745 processor. I'm changing from an I2C EEPROM boot (which was working fine except for memory capacity) to an SPI Flash boot with a larger memory. I cannot find any documentation that describes what communication process the bootloader follows when booting from SPI Flash. Specifically, I'd like to know what opcodes/commands the bootloader uses when reading the memory. The reason is that not all serial flash chips are created equal and some have larger instruction sets than others. It seems that most support some of the most basic commands (using the same opcode numbers) such as a continuous low frequency array read. I would suspect that the bootloader limits it's instruction set use to simple commands such as this, however, I want to be sure.
Best of all, I'd like to see a code snippet from the bootloader program itself that does the actual reading of the SPI Flash. This would help me answer some other concerns I have about the inner workings of the SPI Flash loader. If someone can tell me where to access such a highly useful but apparently difficult to aquire piece of source code I'd be very appreciative. TI has provided bootloader source code for other DSP's (such as the C5509) in the past which were extremely useful but so far I've had no luck getting that for this new processor.
