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[AM335x] Question about clock enabling register on U-Boot.

Hi,

I have some question about Clock enabling source code on U-boot:

I am getting reference from "ti-sdk-am335x-evm-08.00.00.00" for our product porting.
I also getting reference from source code for "AM335x starter-kit".

In source code "board-support/u-boot-2014.07/arch/arm/cpu/armv7/am33xx/clock_am33xx.c"
There is code such like this:

=====================================================================================

void enable_basic_clocks(void)
{
  u32 *const clk_domains[] = {
    &cmper->l3clkstctrl,
    &cmper->l4fwclkstctrl,
    &cmper->l3sclkstctrl,
    &cmper->l4lsclkstctrl,
    &cmwkup->wkclkstctrl,
    &cmper->emiffwclkctrl,
    &cmrtc->clkstctrl,
    0
  };

  u32 *const clk_modules_explicit_en[] = {
    &cmper->l3clkctrl,
    &cmper->l4lsclkctrl,
    &cmper->l4fwclkctrl,
    &cmwkup->wkl4wkclkctrl,
    &cmper->l3instrclkctrl,
    &cmper->l4hsclkctrl,
    &cmwkup->wkgpio0clkctrl,
    &cmwkup->wkctrlclkctrl,
    &cmper->timer2clkctrl,
    &cmper->gpmcclkctrl,
    &cmper->elmclkctrl,
    &cmper->mmc0clkctrl,
    &cmper->mmc1clkctrl,
    &cmwkup->wkup_i2c0ctrl,
    &cmper->gpio1clkctrl,
    &cmper->gpio2clkctrl,
    &cmper->gpio3clkctrl,
    &cmper->i2c1clkctrl,
    &cmper->cpgmac0clkctrl,
    &cmper->spi0clkctrl,
    &cmrtc->rtcclkctrl,
    &cmper->usb0clkctrl,
    &cmper->emiffwclkctrl,
    &cmper->emifclkctrl,
    0
  };

  do_enable_clocks(clk_domains, clk_modules_explicit_en, 1);

  /* Select the Master osc 24 MHZ as Timer2 clock source */
  writel(0x1, &cmdpll->clktimer2clk);
}

=====================================================================================

In this code there is some "clkctrl" register that no information on "AM335x TRM".

The register is following:
  CM_PER Register:
  emiffwclkctrl; /* offset 0xD0 */
  l4fwclkctrl; /* offset 0x64 */

What is the purpose of this register??


Best Regards,
Yuki