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Defintion of PCIe Legacy INTA

Ilan Bogen
Intellectual 330 points

Hi,

I saw in pcieboot_interrupt.c  example code the following definition:

#define PCIEXpress_Legacy_INTA 50

I believe that this is the system interrupt as it is set as a parameter for the CSL_CPINTC_clearSysInterrupt(handle,  PCIEXpress_Legacy_INTA)

What is this definition, a general one used by all devices (6657, 6678, 6670...) or is it a device dependent?

(I'm using 6657)

Thanks,

Ilan.

  • 0
    TI__Mastermind 28085 points

    Hi,

    Yes, PCIEXpress_Legacy_INTA is the secondary system interrupt. The PCIEXpress_Legacy_INTx event ID is common for all devices(6657, 6678, 6670). For more information refer all device data manual.

    50 -- PCIEXpress_Legacy_INTA -- Legacy interrupt mode

    51 -- PCIEXpress_Legacy_INTB -- Legacy interrupt mode

    52 -- PCIEXpress_Legacy_INTC -- Legacy interrupt mode

    53 -- PCIEXpress_Legacy_INTD -- Legacy interrupt mode

    In PCIe interrupt example code, secondary system interrupt(PCIEXpress_Legacy_INTA) mapped to channel 3 out(CIC0_OUT3), the Event ID: 63 (C6678), 59 (C6670) and 25 (C6678). Default MCSDK PCIe interrupt example support for C6678 and C6670 devices only. If you want to run the example on C6657 device means you need to add MAGIC_ADDR and INTC0_OUT3 event No. on example code.

    #ifdef _EVMC6657L_
#define MAGIC_ADDR          0x8ffffc
#define INTC0_OUT3     		25 
#endif

    Thanks,

  • 0 in reply to Ganapathi Dhandapani95
    Intellectual 330 points

    Thanks for the answer.

    I wanted to verify the answer as requested but I find only the Reply button not the Verify Button.

    Where is the Verify Buttom located or there is another way to verify the answer?

    Ilan.

  • 0 in reply to Ilan Bogen
    TI__Guru* 81335 points
    Ilan,

    Its done now. Thank you very much.
  • 0 in reply to Raja
    Intellectual 330 points
    Yes, I saw the Verify Button after I clicked on the Reply button.
    Thanks again.
    Ilan.