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SATA Receiver Clock/data Recovery

Steven Weng1
Expert 2200 points
Other Parts Discussed in Thread: PMP

Hi Tis,

I am using DVRRDK v4.1 and dm8168 custom board.

There are two SATA disks: WD500GB(WD5000BEVT), Seagate 2TB(ST2000DM001)

WD SATA disk works fine in our board but Seagate disk failed.

Here are some messages about Seagate disk:

ata1: softreset failed (1st FIS failed)
ata1: softreset failed (device not ready)
ata1: applying PMP SRST workaround and retrying
ata1: softreset failed (1st FIS failed)
ata1: softreset failed (device not ready)
ata1: applying PMP SRST workaround and retrying
ata1: softreset failed (1st FIS failed)
ata1: limiting SATA link speed to 1.5 Gbps
ata1: softreset failed (device not ready)
ata1: applying PMP SRST workaround and retrying
ata1: SATA link up 1.5 Gbps (SStatus 113 SControl 310)
ata1.00: failed to IDENTIFY (I/O error, err_mask=0x100)
ata1: softreset failed (device not ready)
ata1: applying PMP SRST workaround and retrying
ata1: link is slow to respond, please be patient (ready=0)
ata1: softreset failed (device not ready)
ata1: softreset failed (1st FIS failed)
ata1: applying PMP SRST workaround and retrying
ata1: SATA link up 1.5 Gbps (SStatus 113 SControl 310)
ata1: link online but 1 devices misclassified, retrying
ata1: link is slow to respond, please be patient (ready=0)

...

I have tried to modify the SATA phy control register(Port PHY Control Register in datasheet)

(Bit 15-13) RXCDR: Receiver Clock/data Recovery


In the TI released PSP, the RXCDR set to 0x04 for 2nd order recovery algorithm. But this setting will cause long lock time in some custom board(I dont know why...) So I modify RXCDR from 0x04 to 0x01 to avoid long lock time...But when I change to 0x01 1st order recovery algorithm. The seagate disk detected fail...

1) Could you give me some suggestions to adjust RXCDR value? is it the hardware issue on our board? (long lock time or detected fail...)

2) In datasheet RXCDR value 0x02~0x05 have same description. Is it wrong?

Thanks

BR,

Steven

  • 0
    TI__Guru**** 170625 points

    Steven,

    Steven Weng1 said:
    I am using DVRRDK v4.1 and dm8168 custom board.

    Can you try with the latest DVR RDK linux kernel code base:

    Have you tried the same Hard disk against the TI EVM or DVR reference platform? Are you attaching the HDD to SATA port directly or through bridge (i.e. silicon image Sil3132)? Is this Gen3 or Gen2 disk?

    Regards,
    Pavel

  • 0 in reply to Pavel Botev
    TI__Guru**** 170625 points

    Have you tried both SATA ports?  Please try interchanging the ports and also the cables. You can also try with shorter cable.

     

    See also the below debug tips:

    processors.wiki.ti.com/.../TI_SATA_FAQ
    processors.wiki.ti.com/.../TI_SATA_FAQ

  • 0 in reply to Pavel Botev
    Expert 2200 points
    Hi Pavel,
    Sorry for late reply.
    1) Our linux kernel code tag is dvrrdk_kernel_rel_04.01.00.00.
    2) With RXCDR 0x04(2nd recovery alogrithm, ti default value ), SATA disk could be recognised sucessfully in DVRRDK and custom platform. But it will cause long lock issue when attatching ESATA disk on custom board.
    3) I attatching the HDD to SATA port via a redriver(SN75LVCP412RTJR, Two Channel SATA 3-Gbps Redriver, www.ti.com/.../getliterature.tsp)
    4) HDD is Gen3 disk. Our dm8168 chip revision is 2.0
  • 0 in reply to Pavel Botev
    Expert 2200 points
    Hi Pavel,
    Very thank for your help.
    I have tried with shorter cable(ESATA cable) but long lock issue is still the same.
    The long lock issue will come out at the specific ESATA disks with the specific custom board(Not all disk and custom board...)
    How could I fine tune the Receiver Clock/data Recovery(RXCDR) register? It depends on ?
    Could you give me some suggestions?
    Thanks in advance.
    BR,
    Steven
  • 0 in reply to Steven Weng1
    TI__Guru**** 170625 points

    Hi Steven,

    Steven Weng1 said:
    How could I fine tune the Receiver Clock/data Recovery(RXCDR) register? It depends on ?

    I have found that there is exception for Marvell SATA:

    linux-dvr-rdk-dm81xx/drivers/ata/libahci.c

    #ifdef CONFIG_SATA_MARVELL_PMP_UDDVR
        /** marvell patch **/
        /* [MRVL] start -- port PHYCR(0x78H), field RxCDR, bit[15:13] offset */
        tmp = readl( port_mmio + 0x78);
        tmp = tmp & 0xFFFF1FFF;
        tmp = tmp | (1 << 13);  /* 1 = RxCDR */
        writel(tmp, port_mmio + 0x78);
        /* [MRVL] end -- port PHYCR(0x78H), field RxCDR, bit[15:13] offset */
        #endif

    See also the below patch, which is for similar device:

    Regards,
    Pavel

     

  • 0
    Expert 2440 points

    Hi,Steven

    Did you solve the problem?

    I face the same problem like you.Any suggestion?

    BR,

    vefone