Benchmarking 66AK2H12

Thomas Sioutas

Other Parts Discussed in Thread: 66AK2H12

Hello,

I would like to ask you if it is possible to share with me the tests apps (binary and source code) that are used for the benchmarking of 66AK2H12 (the one which gives the 19.2 GFLOPS).

Thanks,

Thomas

over 11 years ago

0 Raja over 11 years ago

TI__Guru* 81335 points

Welcome to the TI E2E forum. I hope you will find many good answers here and in the TI.com documents and in the TI Wiki Pages (for processor issues). Be sure to search those for helpful information and to browse for the questions others may have asked on similar topics (e2e.ti.com). Please read all the links below my signature.

We will get back to you on the above query shortly. Thank you for your patience.

0 Raja over 11 years ago in reply to Raja

TI__Guru* 81335 points

Please refer below threads which may help you to measure performance.

Measure of GMACS and GFLOPS on DSP:

http://e2e.ti.com/support/dsp/c6000_multi-core_dsps/f/639/t/168987.aspx

Flops of C66x:

http://e2e.ti.com/support/dsp/c6000_multi-core_dsps/f/639/t/145286.aspx

http://e2e.ti.com/support/dsp/c6000_multi-core_dsps/f/639/t/155558.aspx

Thanks.

0 Raja over 11 years ago

TI__Guru* 81335 points

Linpack is a good candidate to run on all cores and make it as loaded as possible.

You can download a example here for Keystone I device(C6678).
e2e.ti.com/.../1506688

Thank you.

0 Raja over 11 years ago in reply to Raja

TI__Guru* 81335 points

Hi,

Please refer below thread as well,

e2e.ti.com/.../426421

Thank you.

0 Asheesh Bhardwaj over 11 years ago in reply to Raja

TI__Expert 4680 points

C66x DSP architecture supports 8 floating Multiplies ( 4 on each M1 and M2 unit) and 8 floating point additions (2 on each L1, L2, S1 and S2 unit). That makes it 16 FLOPS per cycle or 16 GFLOPS for 1GHz machine and 66AK2H12 runs at 1.2 GHz so the device will achieve 16x1.2 = 19.2 GFLOPS. There are specific instructions QMPYSP, CMPYSP which can achieve 4 Multiplies on .M1 or .M2 units and DADDSP which can achieve 2 multiplies on L1, L2, S1 and S2 units. Refer the DSPF_sp_fir_cmplx example in DSPlib which uses the CMPYSP(complex multiply) and DADDSP(dual additions) instructions for achieving 16FLOPS per cycle.

Regards,
Asheesh

Processors

Processors forum

Benchmarking 66AK2H12

Measure of GMACS and GFLOPS on DSP:

Flops of C66x: