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Problem with the reading of the Chip-Level Registers

Hello all,


I try to run example mcsdk_2_01_02_06\tools\boot_loader\examples\pcie\pcieboot_helloworld
under CCS
and after macroses
DEVICE_REG32_W(KICK0, 0x83e70b13);
DEVICE_REG32_W(KICK1, 0x95a4f1e0);
I read 0x00000000 in the addresses 0x02620038 and 0x0262003C with the emulator.

Please explain me how to read the Chip-Level Registers with the emulator and with the
C code correctly.

I used MDSEVM6678L board, CCS 5.2.1.00018, mcsdk_2_01_02_06.

Best regards,
Marek

  • Hi,

    Your code might be correct, KICK registers would return zero.

    You can read some other registers to check.

    What is your requirement ?

    Not able to unlock after KICK registers written ?

    You can read the CHIP LEVEL registers through CCS's memory browser.
    Also you can read through 'C' code,

    #define KICK0 (*((volatile unsigned int *) 0x02620038))
    #define KICK1 (*((volatile unsigned int *) 0x0262003C))

    KICK0 = 0x83e70b13;
    KICK1 = 0x95a4f1e0;

    printf("Keystone 1 : KICK0 0x%x KICK1 0x%x\n",KICK0,KICK1);

  • Hi Marek,

    Welcome to the TI E2E forum. I hope you will find many good answers here and in the TI.com documents and in the TI Wiki Pages (for processor issues). Be sure to search those for helpful information and to browse for the questions others may have asked on similar topics (e2e.ti.com). Please read all the links below my signature.

  • Hi,

    I wanted got the evidence that the IPC interrupt to other cores really started.

    In your references I have found the suggest

    After writing to IPCGRx register, the read return 0(according to the datasheet of C6678). You should check Event flag register 2(EVTFLAG2)  to see whether #91 event is generated. This event is bonding to inter-processor interrupt of IPCGRx. 

    I did not find EVTFLAG2 in SPRS691D. Where do can I find description of this?

    Thank you.

    Best regards,
    Marek

  • Hi Marek,

    I am able to wake up the secondary core from primary core. Please try below procedure in EVM and get back to me if you have any issues.

    1. Set the EVM in "No Boot" mode, connect to core0 and use gel file to initialize the core0.

    2. Go to memory browser, read the address 0x1187FFFC and make a note of it.

    3. Build the attached source and load and run on core0.

    4. After completion of execution, core0 will wait in busy loop(while(1)). Pause the debugging.

    5. Go to memory browser, enter the address 0x1187FFFC.=> 0xBABEFACE

    8407.srioboot_helloworld.c
    /******************************************************************************
     * Copyright (c) 2011 Texas Instruments Incorporated - http://www.ti.com
     *
     *  Redistribution and use in source and binary forms, with or without
     *  modification, are permitted provided that the following conditions
     *  are met:
     *
     *    Redistributions of source code must retain the above copyright
     *    notice, this list of conditions and the following disclaimer.
     *
     *    Redistributions in binary form must reproduce the above copyright
     *    notice, this list of conditions and the following disclaimer in the
     *    documentation and/or other materials provided with the
     *    distribution.
     *
     *    Neither the name of Texas Instruments Incorporated emac the names of
     *    its contributors may be used to endorse or promote products derived
     *    from this software without specific prior written permission.
     *
     *  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
     *  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
     *  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
     *  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
     *  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
     *  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
     *  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
     *  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
     *  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
     *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
     *  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
     *
     *****************************************************************************/
    
    /**************************************************************************************
     * FILE PURPOSE: Boot Hello World Example
     **************************************************************************************
     * FILE NAME: boot_helloworld.c
     *
     * DESCRIPTION: A simple hello world example demonstrating boot.
     *
     ***************************************************************************************/
    #include <stdlib.h>
    #include <stdio.h>
    #include <string.h>
    #include "platform.h"
    
    #define DEVICE_REG32_W(x,y)   *(volatile uint32_t *)(x)=(y)
    #define DEVICE_REG32_R(x)    (*(volatile uint32_t *)(x))
    
    #define CHIP_LEVEL_REG  0x02620000
    #define KICK0           (CHIP_LEVEL_REG + 0x0038)
    #define KICK1           (CHIP_LEVEL_REG + 0x003C)
    
    /* Magic address RBL is polling */
    #ifdef _EVMC6657L_
    #define MAGIC_ADDR          0x8ffffc
    #endif
    
    #ifdef _EVMC6678L_
    #define MAGIC_ADDR          0x87fffc
    #endif
    
    #ifdef _EVMC6670L_
    #define MAGIC_ADDR          0x8ffffc
    #endif
    
    #define BOOT_MAGIC_ADDR(x)  (MAGIC_ADDR + (1<<28) + (x<<24))
    #define IPCGR(x)            (0x02620240 + x*4)
    
    #define NUMBER_OF_CORES 	2
    
    #define BOOT_MAGIC_NUMBER   0xBABEFACE
    
    #define BOOT_NUMBER0   0xAAAA5555
    #define BOOT_NUMBER1   0x11111111
    #define BOOT_NUMBER2   0x22222222
    #define BOOT_NUMBER3   0x33333333
    
    #define DDR_ADDR0       0x81000000
    #define DDR_ADDR1       0x82000000
    #define DDR_ADDR2       0x83000000
    #define DDR_ADDR3       0x84000000
    
    
    
    #define BOOT_UART_BAUDRATE         115200
    
    /* boot_helloworld version */
    char version[] = "01.00.00.01";
    
    /* OSAL functions for Platform Library */
    uint8_t *Osal_platformMalloc (uint32_t num_bytes, uint32_t alignment)
    {
    	return malloc(num_bytes);
    }
    
    void Osal_platformFree (uint8_t *dataPtr, uint32_t num_bytes)
    {
        /* Free up the memory */
        if (dataPtr)
        {
            free(dataPtr);
        }
    }
    
    void Osal_platformSpiCsEnter(void)
    {
        return;
    }
    
    void Osal_platformSpiCsExit (void)
    {
        return;
    }
    
    /******************************************************************************
     * Function:    write_uart
     ******************************************************************************/
    void
    write_uart
    (
        char*      msg
    )
    {
        uint32_t i;
        uint32_t msg_len = strlen(msg);
    
        /* Write the message to the UART */
        for (i = 0; i < msg_len; i++)
        {
            platform_uart_write(msg[i]);
        }
    }
    
    void
    write_boot_magic_number
    (
        void
    )
    {
        uint32_t                coreNum;
    
        coreNum = platform_get_coreid();
    
        DEVICE_REG32_W(MAGIC_ADDR, BOOT_MAGIC_NUMBER);
        
        while(1);
    }
    
    /******************************************************************************
     * Function:    main
     ******************************************************************************/
    void main ()
    {
        char                    version_msg[] = "\r\n\r\nBoot Hello World Example Version ";
        char                    boot_msg[80];
        platform_info           pform_info;
        uint32_t                coreNum, core;
    
        /* Initialize UART */
        coreNum = platform_get_coreid();
        if (coreNum == 0)
        {
            platform_uart_init();
            platform_uart_set_baudrate(BOOT_UART_BAUDRATE);
    
            printf("%s%s\n\n", version_msg, version);
    
            /* Unlock the chip registers */
            DEVICE_REG32_W(KICK0, 0x83e70b13);
            DEVICE_REG32_W(KICK1, 0x95a4f1e0);
    
            /* Writing the entry address to other cores */
            for (core = 1; core < NUMBER_OF_CORES; core++)
            {
                sprintf(boot_msg, "\r\n\r\nBooting Hello World image on Core %d from Core 0 ...", core);
                printf("%s\n",boot_msg);
                
                DEVICE_REG32_W(BOOT_MAGIC_ADDR(core), (uint32_t)write_boot_magic_number);
    
                /* Delay 1 sec */
                platform_delay(1);
            }
            for (core = 1; core < NUMBER_OF_CORES; core++)
            {
                /* IPC interrupt other cores */
                DEVICE_REG32_W(IPCGR(core), 1);
                platform_delay(1000);
            }
    
        }
        else
        {
            write_boot_magic_number();
        }
    
        while(1);
    }
    

    This means that core0 wakes up  core1 successfully. The value 0xBABEFACE  has been written by core1 from function "write_boot_magic_number()".

    You can follow this for all secondary cores by updating NUMBER_OF_CORES.

    Thank you.

  • Hi Rajasekaran,

    It really works
    (with a little addition: in item1 I also ran Global_Default_Setup - to initialize the PLL and DDR)

    Thank you,

    Best regards,
    Marek
  • Hi Marek,
    Thank you for the update.