I have seen somewhere that Sitara's PDI is 8/8. Where can I find descriptions about it ? Does it mean that it has 8 registers of 8 bit width ? Where can see a description of it ?
In my application, I want Sitara primarily to run EtherCAT stack; that means, I wont be using hardware pins of Sitara as my Industrial Control Interface. I will have an FPGA interfacing all the analog and digital channels of industrial system, acquire data / write data to it, through the FPGA. Then I will interface FPGA to Sitara through SPI or custom interfaces like async RAM interface. Is this feasible ? If so, do I have to change the PDI ? Or do I have to customize the stack itself ? Thanks for answering this.
regards
Jayakrishnan. V
