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AM335x power down sequence

Keigo Ishii
Intellectual 820 points
Other Parts Discussed in Thread: TPS65910

Hi,

I have some question about AM335x power down sequence.
Could you please answer my question?

I have gotten the waveform of VDAC(VDDS) and VAUX2(VDDSHVx) on AM335xEVM.
I suspect that it violates the following description on AM335x datasheet.

"It is recommended to maintain VDDS ≥1.5V as all the other supplies fully ramp down to minimize in-rush currents."

Does this waveform violates this description?
If yes, please tell me what I should do to solve this.

Best regards,
Keigo Ishii

  • 0
    Intellectual 820 points

    Sorry, this is the waveform.

  • 0 in reply to Keigo Ishii
    TI__Guru 63145 points
    The requirement to maintain VDDS ≥1.5V as all the other supplies fully ramp down to minimize in-rush currents is preferred, but we understand this may not be possible in some cases.

    The alternative is to make sure VDDSHVx [1-6] is never greater than VDDS plus 2 volts during power supply ramping on/off.

    Regards,
    Paul
  • 0 in reply to peaves
    Genius 3685 points

    In fact, in practice, power down is very non-problematic. At power-down time, the source of energy is switched off, and it's only the energy in the capacitors which is flowing into the CPU. In most cases, this amount of energy cannot harm the CPU. So even if your power down sequence is not perfect, it will typically not destroy the CPU.

    The power-up sequence is critical because of the large amount of energy which is feed into the circuit.

    regards

    Wolfgang

  • 0 in reply to Wolfgang Muees1
    Intellectual 820 points

    Hi Paul-san and Wolfgang-san,

    Thank you for your quick reply.

    In short, the combination of AM335x and TPS65910 is just no problem. Is that right?

    Best regards,
    Keigo Ishii

  • 0 in reply to Keigo Ishii
    TI__Guru 63145 points
    Wolfgang, your comment about power-down not being problematic is not true. I agree the power source may produce higher levels of energy than the capacitors, but the power supply capacitors can store significant amounts of energy. Energy stored in the power supply capacitors is more than enough to generate an Electrical Over-Stress (EOS) if the recommended power-down sequence is not followed.

    There are two common EOS events that damage semiconductors. One common EOS event occurs when more current than expected is forced through circuits which can over-heat individual components in the semiconductor. The other common EOS event occurs when a voltage potential larger than expected is applied to circuit components, where the field strength of the voltage potential breaks down very thin insulators in a semiconductor. The later EOS event doesn’t require any current.

    Ishii-san, the waveforms you posted appear to meet the alternate requirement of not allowing the voltage applied to VDDSHVx [1-6] to exceed the voltage applied to VDDS plus 2 volts.

    Regards,
    Paul
  • 0 in reply to peaves
    Intellectual 820 points

    Hi Paul-san,

    Thank you for your reply.
    OK, I got it.

    Best regards,
    Keigo Ishii