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AM335x NANDI2C boot fallback

Other Parts Discussed in Thread: AM3352

I'm working on a bord using the AM3352 processor and currently have a faulty SPL software on my nand device. I'm hoping to boot with MMC0 and have therefore set the boot sequence to 10101 = NANDI2C, MMC0, EMAC1, UART1. However, the system doesn't boot on the MMC0 device so I'm considering whether the device has fallen into some NANDI2C fallback that isn't fully documented (at least not enough for me to understand it) in the TRM.

If my NAND device supports ONFI detection and boots into NANDI2C without the correct magic number on the EEPROM (or lacking an EEPROM), does it fallback into a standard nand boot (i.e. ONFI detection) or does it continue with the next option in the boot sequence?

Thanks,
// Måns

  • Hi Mans,

    NAND I2C boot will try to read the NAND geometry from an EEPROM located on I2C0, as described on p.4932 from the AM335X TRM Rev. L. If the read is unsuccessful ROM code will proceed with the next device in the boot order. Since you have chosen NANDI2C, MMC0, EMAC1, UART0 you can test this by removing the SD card. You should see 'C' characters appear on the terminal when UART boot is reached, though this will be slow (about 1 character every 3 minutes), due to the EMAC1 boot timeout.

  • Thanks for your answer. I removed the SD card and booted the card but don't see any C characters on my terminal. Are you completely sure that a failed read on the EEPROM (I do have a EEPROM an my board but it's brand new and should be programmed with 0xFF all the way through) means the NANDI2C failed and that there is no fallback to regular NAND boot or fallback to try booting with default NAND settings?
  • Oops, sorry, I didn't read your initial post carefully enough.

    mans.andersson said:
    If my NAND device supports ONFI detection and boots into NANDI2C without the correct magic number on the EEPROM (or lacking an EEPROM), does it fallback into a standard nand boot (i.e. ONFI detection) or does it continue with the next option in the boot sequence?

    I guess I skipped this part. If the NAND is ONFI compliant the processor will directly try to boot from it and run the faulty SPL. The best workaround would be to choose a boot mode that has MMC0 before NAND in boot order.

  • Thanks for confirming my suspicions!