Hi ,
We are using DM8148 on out custom board. DM8148 is interfaced with FPGA. VIN is connected to FPGA. FPGA is feeding data on VIN. We are using DVRRDK 04_01_00_02
1) There is a color bar generation module in the FPGA which generates 1080p30 YUV422 16bit Embedded sync. I am able to capture this data and display on the HDMI.
2) There is a External video decoder chip ADV7842 interfaced to FPGA. When FPGA is feeding the data taken from ADV7842 to DM8148 I am unable to capture the data and display. From the study we understood that ADV7842 is driving 16bit YUV 422 compliance (BTU656). From the DVRRDK API GUIDE,it supports 16 bit- BT1120 standard. Does n't DM8148 or DVRRDK supports 16bit YUV 422 compliance (BTU656) ??. If yes, how to configure capture in BTU656 mode. I am pasting the DVRRDK API content which tells 16Bit -BT1120.
Thanks and Regards,
K.Pranay
