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66AK2H14 DDR3 Design Problems

jie wang75279
Intellectual 740 points
Other Parts Discussed in Thread: 66AK2H14, 66AK2H06

Hi All:

We design 66AK2H14 DDR3A and DDR3B interface according to 64-bit standard.But according to the introduction in "66AK2H06/12/14 Multicore DSP+ARM KeyStone II SOC Silicon" file, the 64-bit DDR3 operation has errors on Revision 1.0. Does the error only affect Revision 1.0 or all Revisions included 1.1 and 2.0? If we use Revision 1.0 and disign the DDR3A and DDR3B interface according to 64-bit standard , can we use the 32-bit operation mode?

Eagerly awating your reply!

Regards,

jie.

 

  • 0
    TI__Mastermind 46460 points
    Jie,

    The errata document states that this issue is only on silicon version 1.0. It does not exist in versions 1.1 and 2.0. Silicon version 1.0 devices were pre-production devices and they have been obsolete for over 2 years. There should be no testing done with these. Please use production grade devices for your development. We can no longer provide support for silicon version 1.0 devices.

    Tom