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C6748 pinmux settings after NOR flash boot

Tim James
Prodigy 160 points

Hi

I am interested in getting more information regarding the behaviour of the boot ROM code in the C6748 when configured to boot from NOR flash.  In particular, I would like to know exactly what pinmux configuration it applies.  (Ideally it would be useful to have access to the boot ROM source or at least the NOR flash boot bit of it!)

I am aware that it is possible to specify pinmux values to be configured when creating an AIS boot file.  However (given that pinmux register reset values given in SPRUGJ7 for the EMIFA IO are for hi-Z outputs) the boot ROM must presumably apply a preliminary EMIFA CS2 and pinmux setup for flash boot in order to be able to access the boot file in the flash in the first place.  Can you tell me which EMIFA IO are enabled?  More specifically, are EMA_RNW, EMA_WE_DQM[0], EMA_WE_DQM[1], EMA_WAIT[0] or EMA_WAIT[1] used/enabled?

I need to know because I wish to configure and use some or all of these pins as GPIO for other purposes and need to know which pins, if any, need to be avoided because they are either a) configured initially as outputs and/or b) likely to start waggling of their own accord during startup while the boot ROM accesses the NOR flash I have hung of CS2.

Many thanks in advance

Tim

  • 0
    TI__Mastermind 27585 points

    Here is a code snippet from the NOR configuration portion of the RBL:


      DEVICE_pinmuxControl(5 ,0xFF000000,0x11000000); // EMA_BA[1],EMA_BA[0]
      DEVICE_pinmuxControl(9 ,0xFFFFFFFF,0x11111111); // EMA_D[7:0]
      DEVICE_pinmuxControl(8,0xFFFFFFFF,0x11111111);  // EMA_D[15:8]
      DEVICE_pinmuxControl(10,0xFFFFFFFF,0x11111111); // EMA_A[23..16]
      DEVICE_pinmuxControl(11,0xFFFFFFFF,0x11111111); // EMA_A[15..8]
      DEVICE_pinmuxControl(12,0xFFFFFFFF,0x11111111); // EMA_A[7..0]
      DEVICE_pinmuxControl(7 ,0x00FF000F,0x00110001); // nEMA_OE, nEMA_WE, nEMA_CS[2]

    Hope that tells you what you need.

    Jeff