Unable to Write to TCP2 Registers

Two things I can think of:

1. Not all EDMA TCs can write to the TCP2 registers.  See Table 4-1 (SCR Configuration Matrix) in the C6455 data sheet.  Make sure you use EDMA TC0 for TCP2 accesses.

2. Make sure the clock to the TCP2 is actually turned on.  See section 3.3 (Peripheral Selection After Device Reset) and section 3.4 (Device State Control Registers) for more information.

Hi Gus,

I had checked out my configurations of programmes using TCP2, I'm sure I have used TC0 for TCP2 accesses. After reading section 3.3 and 3.4, I found there is already some sentences used to configure PERLOCK and PERCFG0 and I'm sure TCP2 is in enable state by reading PERSTAT0 register.

As you said "Make sure the clock to TCP2 is actually turned on", does it refer to PLL1's SYSCLK2 which is used to clock TCP2? However, I found that the official example of TCP2 in Ti's CSL_6455 hadn't configured PLL. So I'm not sure the means of  your words "clock to TCP2".

Best regards

Cesc  

Hi Gus

Today I have read tms320c6455 pdf once again, I find some very strange things: Table7-97.TCP2 Registers in section 7.17.2, the addresses e.g 5000 0000 is a EDMA BUS HEX ADDRESS. It's quite a special address type. I'm afraid this is the reason why these registers can not be read from the corresponding addresses though I had configure them correctly by EDMA. 

when I use DSK to run my TCP2 programme, all TCPIC registers in TCP2_DATA read from CCS register window is 0000 0000. But in simulator environment, these registers could dispaly their value I had configured. The result of decoder is not completely right, so I wanna check registers to know if there were some mistakes about arrangement of tail bit. However I can't read them, it makes me so upset!

Another question is: whether we can only use EDMA to carry configure information into TCP2?

Waiting for your reply sincerely.

Best regards

Cesc

jay chou said:

I found there is already some sentences used to configure PERLOCK and PERCFG0 and I'm sure TCP2 is in enable state by reading PERSTAT0 register.

This is good.  If the PERSTAT0 register shows TCP2 as "enabled", then the clock is turned on.  No issues there.

jay chou said:

Table7-97.TCP2 Registers in section 7.17.2, the addresses e.g 5000 0000 is a EDMA BUS HEX ADDRESS. It's quite a special address type. I'm afraid this is the reason why these registers can not be read from the corresponding addresses though I had configure them correctly by EDMA.

Are you using a memory window to view the location 0x5000 0000 or 0x02BA 0000 or both?

If registers' address begin with 0x02BA, I can watch them in register view window in CCS. However address begin with 0x5000, their values are all 00000000 both in register view window or memory window.