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TimerTick failure

Hi,

Our observations are on c6678EVM in CCS 5.1.1.00031 with sys/bios 6_33_06_50

We are using timer functionality (in sysbios) to trigger an interrupt for every 10ms on C6678. 

However randomly (most of the times after few days) we are seeing that interrupt is not getting generated on every cores.

We read the CSR to see if interrupts are disabled by any chance. But CSR appears to be proper (0x15000003)

Any ideas what makes these timers not generate interrupts? Our ISRs are so simple that they just update one global variable and exit.

Any ideas to debug this issue further? 

Below is our configuration.

var Timer = xdc.useModule('ti.sysbios.timers.timer64.Timer');

Timer.timerSettings[8].ownerCoreId = 0;

var timerParams = new Timer.Params();
timerParams.period = 10000; 
Timer.create(8,'&timerTick',timerParams);

Thanks in advance,

Regards, Kishor

  • Hi Kishor,

    Dongfeng.Judah said:
    However randomly (most of the times after few days) we are seeing that interrupt is not getting generated on every cores.

    How do you know the interrupt is being missed?

    Dongfeng.Judah said:
    We read the CSR to see if interrupts are disabled by any chance. But CSR appears to be proper (0x15000003)

    It sounds like you are looking at the CSR for the values of GIE (current and previous values). Did you check the value of IER?  It's possible to disable individual interrupts, as opposed to a global disable, and the IER would show this.

    Steve

  • Hi Steve,

    How do you know the interrupt is being missed?

    We wait infinitely for a (only) global variable to be updated in ISR. After few days of run, we see the system hangs (for more than 10s at which point we bring down the system) for this global variable to be updated.



    It sounds like you are looking at the CSR for the values of GIE (current and previous values). Did you check the value of IER?
    It's possible to disable individual interrupts, as opposed to a global disable, and the IER would show this.

    Yes, I should have looked at IER for any possible masking of timer interrupts. I will check that and update you.


    Thank you

    Regards, Kishor