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About the access to emif config register in Cache module

Other Parts Discussed in Thread: SYSBIOS

Hi Talents,

I found the following code in C:\ti\bios_6_37_02_27\packages\ti\sysbios\family\c64p\Cache.c

    /*
     *  make a dummy write and read to emif config register to
     *  insure that data made it out to external memory, otherwise
     *  its possible that the data is out of the Master's view but
     *  has not reached its final destination.
     */
    mask = Hwi_disable();
    if (Cache_module->emifAddr != NULL) {
        *(Cache_module->emifAddr) = 0;
        *(Cache_module->emifAddr);
        Cache_module->emifAddr = NULL;
    }

I want to know if it is a unavoidable operation?

The background that I ask for is we enable the MMU in the system, the Cache_module->emifAddr is usually 0x4C000000 and beyond the allowed regison of MMU. So now we need to solve it either by re-config MMU to allow the access or by make it clear whether we can remove this access in Cache module.

Thanks,

Allen

  • Hi Allen,

    Could you please tell me a little more about your system?

    Which hardware platform are you using?

    It sounds like you are running on a C6x DSP processor, as you are referring to the C64P family's Cache module.

    You also mention that you are enabling the MMU, which is supported on the ARM9 (not the DSP).

    Steve
  • Hi Steve,

    We are using Jacinto5 which has a C674x core inside and we have QNX running on ARM.

    So the MMU is managed by ARM and define a accessiable memory area for DSP. Obviously, address like 0x4c000000 is not the scope of DSP if you consider from ARM's point of view.

    I don't know if it's enough for you?

    Thanks,

    Allen

  • Well this code is only called if you pass "true" for the "wait" parameter of the various Cache APIs. Or if you called Cache_wait() directly.

    Instead of stripping it out of the Cache_wait() API, you could just pass "false" for "wait" and avoid calling Cache_wait().

    Steve