AM335X: How to set the clkout2

Sean Zhang

Hi all,

Here we have a custom board based on am335x sk and now we need to set the clkout2 to be 12MHz.

board-am335xevm.c:

static struct pinmux_config clkout2_pin_mux[] = {
{"xdma_event_intr1.clkout2", OMAP_MUX_MODE3 | AM33XX_PIN_OUTPUT},
{NULL, 0},
};

static void clkout2_enable(int evm_id, int profile)
{
   struct clk *ck_32;

   ck_32 = clk_get(NULL, "clkout2_ck");
   if (IS_ERR(ck_32)) {
       pr_err("Cannot clk_get ck_32\n");
       return;
   }
   clk_enable(ck_32);
   setup_pin_mux(clkout2_pin_mux);
}

clock33xx_data.c:

static struct clk clkout2_ck = {
   .name       = "clkout2_ck",
   .parent       = &sysclkout_pre_ck,
   .ops       = &clkops_omap2_dflt,
   .clksel       = clkout2_div,
   .clksel_reg   = AM33XX_CM_CLKOUT_CTRL,
   .clksel_mask   = AM33XX_CLKOUT2DIV_MASK,
   .enable_reg   = AM33XX_CM_CLKOUT_CTRL,
   .enable_bit   = AM33XX_CLKOUT2EN_SHIFT,
   .recalc       = &omap2_clksel_recalc,
   .round_rate   = &omap2_clksel_round_rate,
   .set_rate   = &omap2_clksel_set_rate,
};

Below is all I can find about the clkout2 in the SDK. What should I do then I can get the 12MHz clock? I hope anyone here can help me about this.

Thanks in advanced!

over 10 years ago

0 Biser Gatchev-XID over 10 years ago

TI__Guru**** 393215 points

Hi,

I will forward this to the SW team.

0 Georgi Karpov over 10 years ago

Expert 1185 points

Hi Sean,

refer to TRM chapters:
8.1.6.12 CLKOUT Signals
to see what source you want to be devided to 12 MHz in PRCM module
and
8.1.12.5.1 CM_CLKOUT_CTRL Register (offset = 0h) [reset = 0h]
to configure CM_CLKOUT_CTRL register value.

Also refer here:
e2e.ti.com/.../624919

BR,
Georgi

0 Sean Zhang over 10 years ago in reply to Georgi Karpov

Prodigy 120 points

Hi Georgi,

Thanks for your reply. But I don't know much about the clock configuration. Would you please give some more details and tell me how should it be done? I am using SDK6.0.

Such as post below, I have no idea about these. I need help...

L3Fclock (core PLL) as souce of CLKOUT2. Am i correct with my configuration below?

CONF_XDMA_EVENT_INTR1 = 0x3; //set pin mux to mode 3

CM_CLKMODE_DPLL_CORE = 0x04; // set PLL to bypass mode

while(CM_IDLEST_DPLL_CORE != 0x00000100); //wait ST_MN_BYPASS = 1 to ensure PLL is in bypass

CM_CLKSEL_DPLL_CORE = (1000 << 0x8) | 23; // set DPLL_MULT = 1000, set DPLL_DIV = 23, Core PLL = 1GHz

CM_DIV_M4_DPLL_CORE = 10; //CORE_CLKOUTM4 = 200 MHZ

CM_CLKMODE_DPLL_CORE = 0x7; //set DPLL in lock mode

while(CM_IDLEST_DPLL_CORE != 0x1); //wait to ensure DPLL in lock mode

CM_CLKOUT_CTRL = 0xB9; // enable CLKOUT2, select L3 clock, divide 8 (200Mhz /8 = 25Mhz)

0 Georgi Karpov over 10 years ago in reply to Sean Zhang

Expert 1185 points

Hi,

you can try also to use TI tool AM335x_Clock_Tree_Tool
processors.wiki.ti.com/.../AM335x_Clock_Tree_Tool

BR,
Georgi

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AM335X: How to set the clkout2