Having problems hitting any Sitara Interrupt Sub Routines (ISR's). Any help?
Below I've included:
INTRO
1) Mem/Regs that responses
2) Actual main code
3) cfg script
******INTRO ********
I'm using debugging the Beaglbone Black (SITARA - AM3358) using TI CCS 6 with jtag connection.
I started using the TI-RTOS (sys/bios) configurations but could only get the nmi_int Int 7 to hit the ISR. I then tried to program all registers directly. In general, I can set and read GPIO1 bits. My major problem is getting the interrupts to hit for GPIO1 (Ints 98, 99) . When I step through the code and manually trigger the interrupt pin I designated, the program does break, but not to my ISR routine - It appears to be lost at this point.
When debugging the interrupt code, I'm getting some mixed results when setting up interrupts and/or registers in general. I noticed that not all registers get updated when the HWREG() command is hit (the registers are R/W). Some will update the register and some will not which makes me think I'm missing a clock init or I'm not mapping memory correctly. FYI - If I manual change the values I get the same results.
As part of the debugging, I added a UART0 to my code. I again was not able to hit the interrupt ISRs.
****** 1) Mem/Regs that responses ***********
Mem/regs that update correctly:
INTCPS_INTC_SIR_IRQ (0x48200040)
INTCPS_INTC_ILR_98 (0x48200288)
fnRAMVectors[intrNum] = fnHandler; //(starts at 0x8001E00) My ISR ptr addr are assigned
Mem/regs that will NOT update:
INTCPS_INTC_SYSCONFIG (0x48200010)
INTCPS_INTC_ILR_0 (0x4820000100) thru INTCPS_INTC_ILR_127
Added code that does not work (hangs - Clock not enable for UART??? ) is:
void UARTCharPut(unsigned int baseAdd, unsigned char byteTx)
{
unsigned int lcrRegValue = 0;
/* Switching to Register Operational Mode of operation. */
lcrRegValue = UARTRegConfigModeEnable(baseAdd, UART_REG_OPERATIONAL_MODE);
/*
** Waits indefinitely until the THR and Transmitter Shift Registers are
** empty.
*/
while((UART_LSR_TX_SR_E | UART_LSR_TX_FIFO_E) !=
(HWREG(baseAdd + UART_LSR) & (UART_LSR_TX_SR_E | UART_LSR_TX_FIFO_E)));
******************2) Actual main code *******************
#include "soc_AM335x.h"
#include "beaglebone.h"
#include "gpio_v2.h"
#include "interrupt.h"
#include "hw_control_AM335x.h"
#include <ti/sysbios/BIOS.h>
#include <ti/sysbios/family/arm/a8/Mmu.h>
#include <ti/sysbios/knl/Task.h>
#include "delay.h"
#include "pin_mux.h"
#include <xdc/std.h>
#include <xdc/runtime/Error.h>
#include <xdc/runtime/System.h>
#include <hwi.h>
#include <demoMain.h>
#include <clock.h>
#include <uart_irda_cir.h>
/*****************************************************************************
** INTERNAL MACRO DEFINITIONS
*****************************************************************************/
#define GPIO0_DATA_PORT (SOC_GPIO_0_REGS)
#define GPIO1_DATA_PORT (SOC_GPIO_1_REGS)
#define GPIO_CLK_PIN_NUMBER (29)
#define GPIO_DATA_PIN_NUMBER (30)
#define GPIO_LED_PIN_NUMBER (23)
/*******************************************************************************
** EXTERNAL FUNCTION DECLARATIONS
*******************************************************************************/
extern void gpio1Isr1(void);
extern void GPIO1PinMuxSetup(unsigned int pinNo);
/*****************************************************************************
** INTERNAL FUNCTION DEFINITIONS
*****************************************************************************/
static void PeripheralsSetUp(void);
static void uartIsr(void);
/*
** A function which is used to generate a delay.
*/
static void Delay(volatile unsigned int count)
{
while(count--);
}
/** ======== taskFxn ========*/
Void taskFxn(UArg a0, UArg a1)
{
System_printf("enter taskFxn()\n");
Task_sleep(10);
System_printf("exit taskFxn()\n");
System_flush(); /* force SysMin output to console */
}
// A function to blink LED once each time a falling edge is encountered on CLK pin
static void gpio1Isr1(void)
{
printf("Hello1\n");
/* Clear clk interrupt */
HWREG(SOC_GPIO_1_REGS + 0x2C) = 0x20000000;
HWREG(SOC_GPIO_1_REGS + 0x30) = 0x20000000;
printf("Hello2\n");
/* Driving a logic HIGH on the GPIO pin. */
GPIOPinWrite(GPIO1_DATA_PORT,
GPIO_LED_PIN_NUMBER,
GPIO_PIN_HIGH);
Delay(0x3FFFF);
/* Driving a logic LOW on the GPIO pin. */
GPIOPinWrite(GPIO1_DATA_PORT,
GPIO_LED_PIN_NUMBER,
GPIO_PIN_LOW);
Delay(0x3FFFF);
//again enable Falling edge IRQ
HWREG(GPIO1_DATA_PORT + 0x34) = 0x20000000;
HWREG(GPIO1_DATA_PORT + 0x38) = 0x20000000;
HWREG(GPIO1_DATA_PORT + 0x44) = 0x20000000;
}
// A function to blink LED once each time a falling edge is encountered on CLK pin
static void gpio1ISRfn(void)
{
printf("Hello1\n");
/* Clear clk interrupt */
HWREG(SOC_GPIO_1_REGS + 0x2C) = 0x20000000;
HWREG(SOC_GPIO_1_REGS + 0x30) = 0x20000000;
printf("Hello2\n");
/* Driving a logic HIGH on the GPIO pin. */
GPIOPinWrite(GPIO1_DATA_PORT,
GPIO_LED_PIN_NUMBER,
GPIO_PIN_HIGH);
Delay(0x3FFFF);
/* Driving a logic LOW on the GPIO pin. */
GPIOPinWrite(GPIO1_DATA_PORT,
GPIO_LED_PIN_NUMBER,
GPIO_PIN_LOW);
Delay(0x3FFFF);
//again enable Falling edge IRQ
HWREG(GPIO1_DATA_PORT + 0x34) = 0x20000000;
HWREG(GPIO1_DATA_PORT + 0x38) = 0x20000000;
HWREG(GPIO1_DATA_PORT + 0x44) = 0x20000000;
}
static void ConfigDataPort(void)
{
//PeripheralsSetUp();
/* Enabling functional clocks for GPIO1 instance. */
GPIO1ModuleClkConfig();
/* Selecting GPIO1 pins for use. */
GPIO1PinMuxSetup(29);
GPIO1PinMuxSetup(23);
GPIO1PinMuxSetup(30);
/* Enabling the GPIO module. */
GPIOModuleEnable(GPIO1_DATA_PORT);
/* Resetting the GPIO module. */
GPIOModuleReset(GPIO1_DATA_PORT);
/* Setting the GPIO data as an input pin. */
GPIODirModeSet(GPIO1_DATA_PORT,
GPIO_DATA_PIN_NUMBER,
GPIO_DIR_INPUT);
/* Setting the GPIO clock as an input pin. */
GPIODirModeSet(GPIO1_DATA_PORT,
GPIO_CLK_PIN_NUMBER,
GPIO_DIR_INPUT);
/* Setting the GPIO LED as an output pin. */
GPIODirModeSet(GPIO1_DATA_PORT,
GPIO_LED_PIN_NUMBER,
GPIO_DIR_OUTPUT);
//**************** Check enabling of LED pin ****************
/* Driving a logic HIGH on the GPIO pin. */
GPIOPinWrite(GPIO1_DATA_PORT,
GPIO_LED_PIN_NUMBER,
GPIO_PIN_HIGH);
Delay(0x3FFFF);
/* Driving a logic LOW on the GPIO pin. */
GPIOPinWrite(GPIO1_DATA_PORT,
GPIO_LED_PIN_NUMBER,
GPIO_PIN_LOW);
Delay(0x3FFFF);
//************* Now enable interrupt on CLK pin *************
/* Initialize the ARM Interrupt Controller */
IntAINTCInit();
IntMasterIRQEnable();
/* UART Interrupts */
IntSystemEnable(SYS_INT_UART0INT);
IntPrioritySet(SYS_INT_UART0INT, 0, AINTC_HOSTINT_ROUTE_IRQ);
IntRegister(SYS_INT_UART0INT, uartIsr);
/* GPIO interrupts */
IntSystemEnable(SYS_INT_GPIOINT1A);
IntPrioritySet(SYS_INT_GPIOINT1A, 0, AINTC_HOSTINT_ROUTE_FIQ);//0h = IntIRQ : Interrupt is routed to IRQ; 1h = IntFIQ : Interrupt is routed to FIQ
IntRegister(SYS_INT_GPIOINT1A, gpio1Isr1);
IntSystemEnable(SYS_INT_GPIOINT1B);
IntPrioritySet(SYS_INT_GPIOINT1B, 0, AINTC_HOSTINT_ROUTE_FIQ);
IntRegister(SYS_INT_GPIOINT1B, gpio1Isr1);
// IntSystemEnable(SYS_INT_GPIOINT1B);
// IntPrioritySet( SYS_INT_UART0INT, 0, AINTC_HOSTINT_ROUTE_FIQ);
// IntRegister( SYS_INT_UART0INT, gpio1Isr1);
/* Setting the GPIO_CLK_PIN_NUMBER to raise IRQ at falling edge of input */
GPIOIntTypeSet(GPIO1_DATA_PORT,
GPIO_CLK_PIN_NUMBER,
GPIO_INT_TYPE_FALL_EDGE);
HWREG(GPIO1_DATA_PORT + 0x34) = 0x20000000;
HWREG(GPIO1_DATA_PORT + 0x38) = 0x20000000;
HWREG(GPIO1_DATA_PORT + 0x44) = 0x20000000;
}
/*
** The main function. Application starts here.
*/
int main()
{
unsigned int result = 0;
ConfigDataPort();
PeripheralsSetUp();
printf("Hello_all\n");
Task_Handle task;
Error_Block eb;
System_printf("enter main()\n");
Error_init(&eb);
task = Task_create(taskFxn, NULL, &eb);
if (task == NULL) {
System_printf("Task_create() failed!\n");
BIOS_exit(0);
}
while(1)
{
result = GPIOPinIntStatus(GPIO1_DATA_PORT, 0 ,GPIO_CLK_PIN_NUMBER);
//Hwi_post(98);
printf("GPIOPinIntStatus={0}\n",result);
UARTConsolePutc('a');
};
BIOS_start(); /* does not return */
return(0);
}
/*
** Enable all the peripherals in use
*/
static void PeripheralsSetUp(void)
{
enableModuleClock(CLK_UART0);
enableModuleClock(CLK_I2C0);
/* Timer6 is used for Standby wakeup */
enableModuleClock(CLK_TIMER6);
}
/*
** Uart ISR to read the inputs
*/
static void uartIsr(void)
{
volatile unsigned char rxByte;
; /* Perform nothing */
rxByte = UARTCharGetNonBlocking(SOC_UART_0_REGS);
UARTCharPutNonBlocking(SOC_UART_0_REGS, rxByte);
}
/******************************* End of file *********************************/
***************** 3) cfg script ******************
;
var BIOS = xdc.useModule('ti.sysbios.BIOS');
var Hwi = xdc.useModule('ti.sysbios.hal.Hwi')
var Mmu = xdc.useModule('ti.sysbios.family.arm.a8.Mmu');
var Swi = xdc.useModule('ti.sysbios.knl.Swi');
var Idle = xdc.useModule('ti.sysbios.knl.Idle');
var Clock = xdc.useModule('ti.sysbios.knl.Clock');
var Timer = xdc.useModule('ti.sysbios.hal.Timer');
var GIO = xdc.useModule('ti.sysbios.io.GIO');
var DEV = xdc.useModule('ti.sysbios.io.DEV');
var Memory = xdc.useModule('xdc.runtime.Memory');
var SysMin = xdc.useModule('xdc.runtime.SysMin');
/* Force peripheral section to be NON cacheable strongly-ordered memory */
var peripheralAttrs = {
type : Mmu.FirstLevelDesc_SECTION, // SECTION descriptor
tex: 0,
bufferable : false, // bufferable
cacheable : false, // cacheable
shareable : false, // shareable
noexecute : true, // not executable
};
/* Configure the MMU to allow access to the Clock Module Peripheral Registers */
var CMperipheralBaseAddr = 0x44E00000;
Mmu.setFirstLevelDescMeta(CMperipheralBaseAddr,
CMperipheralBaseAddr,
peripheralAttrs);
/* Configure the MMU to allow access to the GPIO3 Peripheral Registers */
var GPIO3peripheralBaseAddr = 0x481AE000;
Mmu.setFirstLevelDescMeta(GPIO3peripheralBaseAddr,
GPIO3peripheralBaseAddr,
peripheralAttrs);
