CC26xx GPT Edge-Time Mode

Hi,

Are you using TI-RTOS?

Steve

This should be most of it...

// These are some additional includes for the timer routines:
#include <inc/hw_ints.h>
#include <ti/sysbios/family/arm/m3/Hwi.h>
#include <ti/drivers/pin/PINCC26XX.h>
#include <driverlib/timer.h>
#include <driverlib/aux_tdc.h>
#include <driverlib/ioc.h>
#include <driverlib/aon_ioc.h>



// ----------------- I/O interrupt service routines --------------------------

static void GPT0_A_Isr(UArg arg) {

TimerIntClear(GPT0_BASE, TIMER_CAPA_EVENT);
TimerIntClear(GPT0_BASE, TIMER_TIMA_TIMEOUT);

// handle my interrupt event here
Timer0Cnt++; // do some stuff

} //--- end GPT0_A_isr

static void GPT0_B_Isr(UArg arg) {

TimerIntClear(GPT0_BASE, TIMER_CAPB_EVENT);
TimerIntClear(GPT0_BASE, TIMER_TIMB_TIMEOUT);

// handle my interrupt event here
Timer0Cnt++; // do some stuff

} //--- end GPT0_B_isr

// ------------------------------ Timer init & close functions ----------------------------
void initTimers(void)
{
// setup the input pins before calling this.
 
Power_setDependency(PERIPH_GPT0); // Turn on PERIPH power domain and clock for GPT0
Power_setConstraint(Power_SB_DISALLOW); // while the timer is running, we can't power down the perph domain.

// Route Board_COUNTER_IN to IO event port 0 (0 = Timer0A, 1 = Timer0B, 2 = Timer1A.., I think)
while (hAfePins == NULL){}; // wait here for pins to be assigned, it is being done by another task thread.
PINCC26XX_setMux(hAfePins, PIN_ID(Board_COUNTER_IN), IOC_PORT_MCU_PORT_EVENT0);

// Reset the timer registers - probably not needed for production, but seems to help with debug
HWREG(GPT0_BASE + GPT_O_CTL) = 0;
HWREG(GPT0_BASE + GPT_O_TAMR) = 0;
HWREG(GPT0_BASE + GPT_O_TAPR) = 0;
HWREG(GPT0_BASE + GPT_O_TBPR) = 0;

TimerPrescaleSet(GPT0_BASE, TIMER_A, 255);
TimerPrescaleSet(GPT0_BASE, TIMER_B, 255);

TimerConfigure(GPT0_BASE, TIMER_CFG_SPLIT_PAIR | TIMER_CFG_A_CAP_TIME_UP | TIMER_CFG_B_PERIODIC_UP);

TimerWaitOnTriggerControl(GPT0_BASE, TIMER_A, FALSE);
TimerWaitOnTriggerControl(GPT0_BASE, TIMER_B, FALSE);

TimerStallControl(GPT0_BASE, TIMER_BOTH, TRUE); // halt on debug.

// Setup HWI handler
//Hwi_Params_init(&hwiParams);

if (Hwi_create(INT_TIMER0A, GPT0_A_Isr, NULL, NULL) == NULL) {
System_abort("Can't create Hwi A"); }

if (Hwi_create(INT_TIMER0B, GPT0_B_Isr, NULL, NULL) == NULL) {
System_abort("Can't create Hwi B"); }

TimerIntClear(GPT0_BASE, TIMER_TIMA_TIMEOUT);
TimerIntClear(GPT0_BASE, TIMER_CAPA_EVENT);
TimerIntClear(GPT0_BASE, TIMER_TIMB_TIMEOUT);

TimerIntEnable(GPT0_BASE, TIMER_CAPA_EVENT | TIMER_TIMB_TIMEOUT);

TimerEnable(GPT0_BASE, TIMER_BOTH); // Timer Enable
} //--- end of initTimers

void closeTimers(void)
{
TimerIntDisable(GPT0_BASE, TIMER_CAPA_EVENT | TIMER_TIMB_TIMEOUT);

TimerDisable(GPT0_BASE, TIMER_A); // Timer disable
TimerDisable(GPT0_BASE, TIMER_B); // Timer disable
Power_releaseDependency(PERIPH_GPT0); // Turn on PERIPH power domain and clock for GPT0
Power_releaseConstraint(Power_SB_DISALLOW); // while the timer is running, we can't power down the perph domain.
} //--- closeTimers

Thanks so much Arthur!

edit:nevermind