C6746 Timing Degradation Specs at CVDD 1.3V

Tsutomu Furuse

Hi.

Would you please tell me the timing degradation specifications of C6746 Errata advisory 2.3.9 for CVDD 1.3V case? The advisory describes them only for CVDD 1.2V. The data for CVDD 1.2V case is also applicable to CVDD 1.3V casee? I'm interested in EMIFA setup-time and uPP setup-times especially.

Best regards,
Tsutomu Furuse

over 10 years ago

0 Antony Samsunil over 10 years ago

TI__Expert 4760 points

Tsutomu-san,

We characterize this with the worst corner cases (Process, voltage and temperature). So, we mention the data only for minimum core operating conditions (1.2V). Margin will be decent for maximum operating conditions.

Please let me know if you’ve any clarification.

Regards
Antony

0 Tsutomu Furuse over 10 years ago in reply to Antony Samsunil

Expert 1435 points

Antony,

Thank you for the answer.

Best regards,
Tsutomu Furuse

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C6746 Timing Degradation Specs at CVDD 1.3V