• State
  • Locked Locked
  • Replies 5 replies
  • Subscribers 98 subscribers
  • Views 685 views
  • Users 0 members are here
Support feedback
Options
Options
Related

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

PHY version for TCI6614 integration with RRH

Amit Shenoy
Prodigy 100 points

We are using LTE PHY (LWP 1410) provided by TI as part of our LTE program, involving integration with a external RRH. The build folder name is 6614_phy_main_20140617_1904_RF_TDD_HW5_UIA1 and binary file version is phy_main_20140617_1904_RF_TDD.out.

We are unable to establish CPRI sync between BBM and RRH, which is not SCBP.

Going through the Release Notes provided with the binary, we noted that the Compilation Settings of HLTC binaries is with "HW platform:  Appleton (Cfg_HW_PLATFORM = 5)". This HW Platform Setting corresponds to "case of TCI6614 on the Appleton EVM board with SCBP Relay RF (all revisions), as mentioned in section 6.2.1. It also notes that choice of Cfg_HW_PLATFORM affects the active CPRI link used by PHY.

Is the LTE L1 binary provided to us with the same setting mentioned above? If yes, would it be expected to work with a non-SCBP RRH or would the HW Platform relevant in our case need to be "1" (case of TCI6614 on the Appleton EVM board with baseband (all revisions)).

Regards,

Amit

  • 0
    TI__Mastermind 21025 points

    Hello,

    The file I have corresponding to LWP1410 is sc_lte_phy_04_01_lwp1410_generic.gz, which does not contain binaries so I can't say with what Cfg_HW_PLATFORM your binary was built.  It does seem that Cfg_HW_PLATFORM=1 is the correct value for your configuration. Have you tried editing the makefile and building your own binary?

    Using the current binary, if you dump the memory at 0x01f08000 (32 bytes, SD Link 0 registers), 0x01f0b000 (32 bytes, SD PLL registers), and 0x01f04400 (EE SD Raw Status reg), do you see any sign of lock? Refer to SPRUGV7D (AIF2 user guide for Keystone I).

  • 0 in reply to db_woodall
    Prodigy 100 points
    Can a PHY binary with Cfg_HW_Platform=1 be used to connect to any Radio Card (SCBP or RRH)?
    There is a thinking that this PHY binary can be used to connect to test UE without Radio i.e. Appleton CPRI link to be connected to test UE CPRI link. Some test UEs provide this facility e.g. IXIA test UE. Consequently, this mode means the PHY binary can be used only for baseband testing and NOT with RF/radio.

    For Cfg_HW_Platform=5 setting, is there any specific SCBP related dependency/code in the PHY that needs to changed or "broken" in order to be able to use it with a different RF i.e. an RRH

    Finally, can the GPS input onto the Appleton EVM be used to provide an accurate clock to the RRH through the CPRI link of the PHY

    Would request some clarification in this regard please
  • 0 in reply to Amit Shenoy
    TI__Mastermind 21025 points

    I searched the code and the only difference I saw between a Cfg_HW_PLATFORM value of 5 verses 1 is the System_printf on line 127 of toplevel\phy\phy_main.c.  If you are unsure what the compiled version is, look at line 111 of this file.  When you run the program, it will dump the value via this printf.

    I am told that yes, the EVM's GPS input can be used to provide a clock to the TCI6614.  I don't have any details yet on how it could be used to control the AIF2.  The datasheet does mention (assuming the GPS input is connected to TIMI0 or TIMI1) how it can be used to drive the general purpose timers. I will let you know as I find out more.

  • 0 in reply to db_woodall
    TI__Mastermind 21025 points

    To use the TCI6614 EVM's GPS input as a clock source, you would need to follow these steps:

    1. GPS signal connects to TCI6614 EVM’s “GPS Ant In” input.

    2. “GPS Ant In” input feeds GNS chip.

    3. GNS chip provides 1 PPS output (not ideal, jitter reflects GPS variability).

    4. PPS output feeds into TIMI0/1 (input pins) on TCI6614.

    5. TIMI0/1 drives TIMERx (0..11) based on TINPSEL register.

    6. TIMERx, using compare feature, drives event to the TCI6614 PLL (controlling the VCO).

    7. Once stabilized, the VCO generates a 1PPS pulse train driving the TIMO0/1 (output pins) on TCI6614, based on the TOUTPSEL register.

    8. TIMO0/1 TCI6614 output pins can be connected to:

      1.  AIF2’s PhySync, or

      2. External device such as RRH.

  • 0 in reply to db_woodall
    Prodigy 100 points
    After achieving CPRI Sync between EVM & RRH, we are observing a Frequency Offset Error of -20 KHz on Spectrum Analyzer.
    After ensuring that the steps mentioned for using GPS input as a clock source are followed, we connected a GPS signal to TCI6614 EVM's GPS Antenna IN input. Still, the anaylzer reports a frequency offset error of -20 KHz. So, obviously the SoC is not able to tune to the GPS as clock source. Any input on this would be much appreciated as other wise we are blocked in our progress.

    Thanks!

    -Amit