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uart tx with edma event trigger

hi tier


    my last post is e2e.ti.com/.../1558798


and I read the wiki doc about the uart processors.wiki.ti.com/.../CIR


there is a questions about the uart with edma mode


1.In the wiki doc explain why use the dummy link "UART generates a transmit event to the EDMA whenever its Transmit Holding Register(THR)/TX FIFO becomes empty. The EDMA then transfers the configured number of bytes to the THR/TX FIFO. On the last transaction, EDMA again transfers the requisite number of bytes and its count fields are depleted to zero. UART transfers these bytes and again generates an event to EDMA. If a Dummy PaRAM set is linked to the TX PaRAM set, the EDMA services the Dummy PaRAM set before raising a completion interrupt to the ARM processor. In the absence of this Dummy PaRAM set, EDMA registers a missed event and raises an error interrupt to the ARM."


the dummy paramset will respones only one event or always respones the event until enter the ISR to UARTDMADisable and EDMA3DisableTransfer?

  • Yihao,
    We are looking into your question and will get back to you. Thank.

    Lali
  • thx Lali

        I will wait. If you need validation on AM335X's hdl simulation platform, I can supply my project with libs.

  • hi Lali
    there is another problem when i use the uart and edma.I add the uart receive function in my code like this

    #define UART_DMA_Tx_CHANNEL_NUM (26)

    #define UART_DMA_Rx_CHANNEL_NUM (27)

    unsigned char welcome[] = "Sta";

    unsigned char* rxbuffer = 0x8a000000;

    while(1)

    {

    //---------------------rx characters---------------------

    Uart_EDMARx(rxbuffer,
    RXBUF_LEN,
    UART_DMA_Rx_CHANNEL_NUM,
    UART_DMA_Rx_L_CHANNEL_NUM);

    Uart_Dma_Wait(UART_DMA_Rx_CHANNEL_NUM);


    EDMA3ClrIntr(SOC_EDMA30CC_0_REGS, UART_DMA_Rx_CHANNEL_NUM);

    //------------------------------------------------------------------------------------

    Uart_EDMATx(rxbuffer,
    RXBUF_LEN,
    UART_DMA_Tx_CHANNEL_NUM,
    UART_DMA_Tx_L_CHANNEL_NUM);


    Uart_Dma_Wait(UART_DMA_Tx_CHANNEL_NUM);

    EDMA3ClrIntr(SOC_EDMA30CC_0_REGS, UART_DMA_Tx_CHANNEL_NUM);

    }

    if I receive only while-loop works well.If i do the echo(receive and then transmit),the uart_terminal only one character.

    I use the fifo on in uart and tx_level:1 tx_threhold:1 rx_level:1
    don't use interrupt.

    can you look into this
  • Hi Yihao,
    It seems that the dummy transfer is required for each transfer. Can you try the following test:

    - Change the tx_level and tx_threshold to 3 (do the same for the receive side as well). See if this changes the behavior of your test.
    - If it did change the behavior, revert the values to 1 and use the dummy PARAM after each transfer.

    Please keep me posted on your findings.
    Thanks,
    Lali
  • hi TIer

        Thanks for Lali's suggetsion my last post about the edma and uart e2e.ti.com/.../435462

    very sorry for my delay.I did the test according to the suggestion(set the tx_level:3 tx_threshold:3 rx_level) but the problem is still exsit(can only echo once).

  • Hello,

    Does anyone knows why we transmit a dummy at the start ?
    Is it really required ?

    Thank you,
    Ran