hi tier
my last post is e2e.ti.com/.../1558798
and I read the wiki doc about the uart processors.wiki.ti.com/.../CIR
there is a questions about the uart with edma mode
1.In the wiki doc explain why use the dummy link "UART generates a transmit event to the EDMA whenever its Transmit Holding Register(THR)/TX FIFO becomes empty. The EDMA then transfers the configured number of bytes to the THR/TX FIFO. On the last transaction, EDMA again transfers the requisite number of bytes and its count fields are depleted to zero. UART transfers these bytes and again generates an event to EDMA. If a Dummy PaRAM set is linked to the TX PaRAM set, the EDMA services the Dummy PaRAM set before raising a completion interrupt to the ARM processor. In the absence of this Dummy PaRAM set, EDMA registers a missed event and raises an error interrupt to the ARM."
the dummy paramset will respones only one event or always respones the event until enter the ISR to UARTDMADisable and EDMA3DisableTransfer?