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AM437x DSS driver development: got into SYNC_LOST status

Xiaoyong Sun
Prodigy 80 points

Hi 

I am working on the DSS driver development for AM437x device. 

I got a SYNC_LOST from the irq_status register ( DISPC_IRQSTS Register ).  The description of the error message in the TRM is not very clear to me. I wonder which part  (pclk? ) I should look in to figure out the root cause of the problem?

Please let me know if more information such as some register values are needed to narrow down the issue. 

Thanks,

Xiaoyong Sun

 

  • 0
    TI__Guru**** 393215 points

    Hi,

    I will ask the factory team for an explanation.

  • 0 in reply to Biser Gatchev-XID
    TI__Mastermind 22946 points

    Hi Xiaoyong Sun,

    Please share the full configuration that you are using

    -        What is the resolution and fps of the display?

    -        How many pipes are used ? Any scaling being done in pipes on the fly?

    -        Functional clock and pixel clock?

    -        Is there an UNDER_FLOW interrupt preceding SYNC_LOST?

    A full register dump will be helpful to provide some suggestions.

    Regards,

    Manisha

  • 0 in reply to Manisha Agrawal
    Prodigy 80 points

    Hi Manisha,

    Thanks for looking into this. Because I am in bringing-up stage, I try to simply the usage by enabling only one pipeline (gfx layer) and no-scaling. The LCD is the default one (osddisplays,osd057T0559-34ts ?) on GP board, and it is 800x480 based on my understandings. The timing parameters are taken from (and I checked in the Linux code as well):

    http://lists.infradead.org/pipermail/linux-arm-kernel/2014-May/258502.html

    The Functional clock is from DSS1_ALWON_FCLK  (according to TRM).

    DPLL4 (DPLL4_ALWON_FCLK)  is 24M;

    By formula:

    CLKOUT = (M / (N+1)) * CLKINP * (1/M2)

    where, M=25, N=1; M2=2 

    The Function clock should be 150M.

    Then, it goes to DISPC_DIVISOR1 and generates PCLK (again, based on my understanding). I am current using 33333 (kHz); --- PCLK is 33000 (kHz). The iRQ_STATUS is 0x408E.

    Please let me know if you need more informations --- I can dump sone DSS/DISPC/PRCM registers for you to verify. Please provide a list of physical address to look at so I can dump from target. The document is not very clear to me and some of my understandings could be wrong --- that may be the problem either.

    Thanks,

    Xiaoyong

  • 0 in reply to Xiaoyong Sun
    TI__Mastermind 22946 points
    To confirm the frame rate and resolution of display, you can use modetest. Just type modetest in the terminal of target board and share the log
    Please get the regsietr address dump starting from 0x4832A400 to 0x4832A634
  • 0 in reply to Manisha Agrawal
    Prodigy 80 points

    Hi Manisha,

    My work is on QNX platform which has different implementation. From my debug log, I can see that the frame-rate and resolution settings are expected:

    Jan 01 00:16:05    5     8   200 wfd: 1 lcd_setmode - Set LCD mode to 800 480 59.523811 0

    which is from " DC_LOG( "Set LCD mode to %d %d %f %d", mode->width, mode->height, mode->refresh, mode->interlaced);"

    The related register dumps (DSS/DISPC/PRCM/CM_WKUP) are provided as below.

    On thing is that I don't config RFBI module and I am expecting "bypass" mode works from DISPC configuration --- it works on omap-jacinto6/dss but not sure how/whether it works on AM437x/dss.

    Thanks,

    Xiaoyong

    (DSS_TOP)

    # in32 0x4832A000

    4832a000 : 00000020

    #

    #

    # in32 0x4832A010 24

    4832a010 : 00000001

    4832a014 : 00000001

    4832a018 : 00000000

    4832a01c : 00000000

    4832a020 : 00000000

    4832a024 : 00000000

    4832a028 : 00000000

    4832a02c : 00000000

    4832a030 : 00000000

    4832a034 : 00000000

    4832a038 : 00000000

    4832a03c : 00000000

    4832a040 : 00000018

    4832a044 : 00000000

    4832a048 : 00000000

    4832a04c : 00000000

    4832a050 : 00000000

    4832a054 : 00000000

    4832a058 : 00000000

    4832a05c : 000000a5

    4832a060 : 00000000

    4832a064 : 00000000

    4832a068 : 00000000

    4832a06c : 00000000

     

     

    [DISPC]

     

    # in32 0x4832A400

    4832a400 : 00000030

    #

    #

    # in32 0x4832A410 4

    4832a410 : 0000120d

    4832a414 : 00000001

    4832a418 : 0000000e

    4832a41c : 00000020

     

    # in32 0x4832A410 4

    4832a410 : 0000120d

    4832a414 : 00000001

    4832a418 : 0000000e

    4832a41c : 00000020

    #

    #

    # in32 0x4832A440 20

    4832a440 : 00018309

    4832a444 : 00000000

    4832a448 : 000003ff

    4832a44c : 00000000

    4832a450 : 00000000

    4832a454 : 00000000

    4832a458 : 00000000

    4832a45c : 00000000

    4832a460 : 000001df

    4832a464 : 00f0d11d

    4832a468 : 00a0160c

    4832a46c : 00033000

    4832a470 : 00010004

    4832a474 : 00ff00ff

    4832a478 : 00000000

    4832a47c : 01df031f

    4832a480 : 00000000

    4832a484 : 00000000

    4832a488 : 00000000

    4832a48c : 07ff07ff

     

    #

    # in32 0x4832A4A0 41

    4832a4a0 : 000048a0

    4832a4a4 : 07ff077f

    4832a4a8 : 00000400

    4832a4ac : 00000001

    4832a4b0 : 00000001

    4832a4b4 : 00000000

    4832a4b8 : 00000000

    4832a4bc : 00000000

    4832a4c0 : 00000000

    4832a4c4 : 00000000

    4832a4c8 : 00000000

    4832a4cc : 00000000

    4832a4d0 : 07ff077f

    4832a4d4 : 00000400

    4832a4d8 : 00000001

    4832a4dc : 00000001

    4832a4e0 : 00000000

    4832a4e4 : 00000000

    4832a4e8 : 00000000

    4832a4ec : 00000000

    4832a4f0 : 00000000

    4832a4f4 : 00000000

    4832a4f8 : 00000000

    4832a4fc : 00000000

    4832a500 : 00000000

    4832a504 : 00000000

    4832a508 : 00000000

    4832a50c : 00000000

    4832a510 : 00000000

    4832a514 : 00000000

    4832a518 : 00000000

    4832a51c : 00000000

    4832a520 : 00000000

    4832a524 : 00000000

    4832a528 : 00000000

    4832a52c : 00000000

    4832a530 : 0199012a

    4832a534 : 012a0000

    4832a538 : 079c0730

    4832a53c : 0000012a

    4832a540 : 00000205

     

    #

    # in32 0x4832A54C 59

    4832a54c : 00000000

    4832a550 : 00000000

    4832a554 : 00000000

    4832a558 : 00000000

    4832a55c : 00000000

    4832a560 : 03ff03c0

    4832a564 : 00000400

    4832a568 : 00000001

    4832a56c : 00000001

    4832a570 : 00000000

    4832a574 : 00000000

    4832a578 : 00000000

    4832a57c : 00000000

    4832a580 : 00000000

    4832a584 : 00000000

    4832a588 : 00000000

    4832a58c : 00000000

    4832a590 : 00000000

    4832a594 : 00000000

    4832a598 : 00000000

    4832a59c : 00000000

    4832a5a0 : 00000000

    4832a5a4 : 00000000

    4832a5a8 : 00000000

    4832a5ac : 00000000

    4832a5b0 : 00000000

    4832a5b4 : 00000000

    4832a5b8 : 00000000

    4832a5bc : 00000000

    4832a5c0 : 00000000

    4832a5c4 : 00000000

    4832a5c8 : 00000000

    4832a5cc : 00000000

    4832a5d0 : 00000000

    4832a5d4 : 00000000

    4832a5d8 : 00000000

    4832a5dc : 00000000

    4832a5e0 : 00000000

    4832a5e4 : 00000000

    4832a5e8 : 00000000

    4832a5ec : 00000000

    4832a5f0 : 00000000

    4832a5f4 : 00000000

    4832a5f8 : 00000000

    4832a5fc : 00000000

    4832a600 : 00000000

    4832a604 : 00000000

    4832a608 : 00000000

    4832a60c : 00000000

    4832a610 : 00000000

    4832a614 : 00000000

    4832a618 : 00000000

    4832a61c : 00000000

    4832a620 : 00000000

    4832a624 : 00000000

    4832a628 : 00000000

    4832a62c : 00000100

    4832a630 : 00000100

    4832a634 : 00000100

     

     

    (PRCM_PM_PER_PWRSTCTRL)

    # in32 0x44DF9200 20

    44df9200 : 00000e02

    44df9204 : 00000000

    44df9208 : 00000000

    44df920c : 00000000

    44df9210 : 00000000

    44df9214 : 00000000

    44df9218 : 00000000

    44df921c : 00000000

    44df9220 : 00000002

    44df9224 : 00000000

    44df9228 : 00000000

    44df922c : 00000000

    44df9230 : 00000000

    44df9234 : 00000000

    44df9238 : 00000000

    44df923c : 00000000

    44df9240 : 00000000

    44df9244 : 00000000

    44df9248 : 00000000

    44df924c : 00000000

     

     

    (CM_WKUP)

    # in32 0x44DF2D38

    44df2d38 : 0000032a

    #

    # in32 0x44DF2D3C

    44df2d3c : 00000228

    #

    #

     

    # in32 0x44DF2E20 10

    44df2e20 : 00000007

    44df2e24 : 00000001

    44df2e28 : 00000000

    44df2e2c : 00001901

    44df2e30 : 00000222

    44df2e34 : 00000000

    44df2e38 : 00000000

    44df2e3c : 00000000

    44df2e40 : 00000000

    44df2e44 : 00000000

     

  • 0 in reply to Xiaoyong Sun
    TI__Mastermind 22946 points

    The resolution, clock frequencies and clock divisor values look all okay.

    Register dump looks incorrect or captured at the wrong time. The GFX register values does not look correct

    GFX_BA  points to ‘0’ ? (4832a480 : 00000000, 4832a484 : 00000000)

    GFX_ATTRIBUTES.ENABLE = 0 ? (4832a4a0 : 000048a0)

    GFX_SIZE = 2Kx2K ? (4832a48c : 07ff07ff)

    Can you check this discrepancy? 

    Other than that you can try the following -  Use VID1 pipe instead of GFX pipe and see if SYNC_LOST persists

  • 0 in reply to Manisha Agrawal
    Prodigy 80 points
    The register-dump was taken when no graphics app running, and thus no pipeline commit.

    If I run a graphics app at background, I got:

    # in32 0x4832a480 2
    4832a480 : ff400000
    4832a484 : ff400000
    #
    4832a4a0 : 000048b1
    4832a4a4 : 07ff077f
    4832a48c : 01df031f

    Thanks!
  • 0 in reply to Xiaoyong Sun
    Prodigy 80 points
    SAME SYNC_LOST observations for VID1 pipeline.

    # # in32 0x4832A000
    # in32 0x4832A000
    4832a000 : 00000020
    #
    #
    # in32 0x4832A010 24
    4832a010 : 00000001
    4832a014 : 00000001
    4832a018 : 00000000
    4832a01c : 00000000
    4832a020 : 00000000
    4832a024 : 00000000
    4832a028 : 00000000
    4832a02c : 00000000
    4832a030 : 00000000
    4832a034 : 00000000
    4832a038 : 00000000
    4832a03c : 00000000
    4832a040 : 00000018
    4832a044 : 00000000
    4832a048 : 00000000
    4832a04c : 00000000
    4832a050 : 00000000
    4832a054 : 00000000
    4832a058 : 00000000
    4832a05c : 000000a5
    4832a060 : 00000000
    4832a064 : 00000000
    4832a068 : 00000000
    4832a06c : 00000000
    #
    # in32 0x4832A400
    4832a400 : 00000030
    #
    #
    # in32 0x4832A410 4
    4832a410 : 0000120d
    4832a414 : 00000001
    4832a418 : 0000480e
    4832a41c : 00000020
    #
    #
    #
    #
    # in32 0x4832A440 20
    4832a440 : 00018309
    4832a444 : 00000004
    4832a448 : 000003ff
    4832a44c : 00000000
    4832a450 : 00000000
    4832a454 : 00000000
    4832a458 : 00000000
    4832a45c : 00000141
    4832a460 : 000001df
    4832a464 : 00f0d11d
    4832a468 : 00a0160c
    4832a46c : 00033000
    4832a470 : 00010004
    4832a474 : 00ff00ff
    4832a478 : 00000000
    4832a47c : 01df031f
    4832a480 : 00000000
    4832a484 : 00000000
    4832a488 : 00000000
    4832a48c : 00000000
    #
    #
    # in32 0x4832A4A0 41
    4832a4a0 : 00000000
    4832a4a4 : 07ff077f
    4832a4a8 : 00000400
    4832a4ac : 00000001
    4832a4b0 : 00000001
    4832a4b4 : 00000000
    4832a4b8 : 00000000
    4832a4bc : ff400000
    4832a4c0 : ff400000
    4832a4c4 : 00000000
    4832a4c8 : 01df031f
    4832a4cc : 00888011
    4832a4d0 : 07ff077f
    4832a4d4 : 00000400
    4832a4d8 : 00000001
    4832a4dc : 00000001
    4832a4e0 : 00000000
    4832a4e4 : 01df031f
    4832a4e8 : 00000000
    4832a4ec : 00000000
    4832a4f0 : 00000000
    4832a4f4 : 00000000
    4832a4f8 : 00000000
    4832a4fc : 00000000
    4832a500 : 00000000
    4832a504 : 00000000
    4832a508 : 00000000
    4832a50c : 00000000
    4832a510 : 00000000
    4832a514 : 00000000
    4832a518 : 00000000
    4832a51c : 00000000
    4832a520 : 00000000
    4832a524 : 00000000
    4832a528 : 00000000
    4832a52c : 00000000
    4832a530 : 0199012a
    4832a534 : 012a0000
    4832a538 : 079c0730
    4832a53c : 0000012a
    4832a540 : 00000205
    #
    #
    # in32 0x4832A54C 59
    4832a54c : 00000000
    4832a550 : 00000000
    4832a554 : 00000000
    4832a558 : 00000000
    4832a55c : 00000000
    4832a560 : 03ff03c0
    4832a564 : 00000400
    4832a568 : 00000001
    4832a56c : 00000001
    4832a570 : 00000000
    4832a574 : 00000000
    4832a578 : 00000000
    4832a57c : 00000000
    4832a580 : 00000000
    4832a584 : 00000000
    4832a588 : 00000000
    4832a58c : 00000000
    4832a590 : 00000000
    4832a594 : 00000000
    4832a598 : 00000000
    4832a59c : 00000000
    4832a5a0 : 00000000
    4832a5a4 : 00000000
    4832a5a8 : 00000000
    4832a5ac : 00000000
    4832a5b0 : 00000000
    4832a5b4 : 00000000
    4832a5b8 : 00000000
    4832a5bc : 00000000
    4832a5c0 : 00000000
    4832a5c4 : 00000000
    4832a5c8 : 00000000
    4832a5cc : 00000000
    4832a5d0 : 00000000
    4832a5d4 : 00000000
    4832a5d8 : 00000000
    4832a5dc : 00000000
    4832a5e0 : 00000000
    4832a5e4 : 00000000
    4832a5e8 : 00000000
    4832a5ec : 00000000
    4832a5f0 : 00000000
    4832a5f4 : 00000000
    4832a5f8 : 00000000
    4832a5fc : 00000000
    4832a600 : 00000000
    4832a604 : 00000000
    4832a608 : 00000000
    4832a60c : 00000000
    4832a610 : 00000000
    4832a614 : 00000000
    4832a618 : 00000000
    4832a61c : 00000000
    4832a620 : 00000000
    4832a624 : 00000000
    4832a628 : 00000000
    4832a62c : 00000100
    4832a630 : 00000100
    4832a634 : 00000100
    #
    #
    # in32 0x44DF9200 20
    44df9200 : 00000e02
    44df9204 : 00000000
    44df9208 : 00000000
    44df920c : 00000000
    44df9210 : 00000000
    44df9214 : 00000000
    44df9218 : 00000000
    44df921c : 00000000
    44df9220 : 00000002
    44df9224 : 00000000
    44df9228 : 00000000
    44df922c : 00000000
    44df9230 : 00000000
    44df9234 : 00000000
    44df9238 : 00000000
    44df923c : 00000000
    44df9240 : 00000000
    44df9244 : 00000000
    44df9248 : 00000000
    44df924c : 00000000
    #
    #
    # in32 0x44DF2D38
    44df2d38 : 0000032a
    #
    #
    # in32 0x44DF2D3C
    44df2d3c : 00000228
    #
    #
    # in32 0x44DF2E20 10
    44df2e20 : 00000007
    44df2e24 : 00000001
    44df2e28 : 00000000
    44df2e2c : 00001901
    44df2e30 : 00000222
    44df2e34 : 00000000
    44df2e38 : 00000000
    44df2e3c : 00000000
    44df2e40 : 00000000
    44df2e44 : 00000000
    #
    #
  • 0 in reply to Xiaoyong Sun
    Prodigy 80 points

    >>Do I need to configure RFBI module __explicitly__ in order to enable "bypass" mode?
    >> If so, what are the minimal settings of the related registers?

    Just compare the register values between linux and qnx, looks the SAME as well.

    # in32 0x4832A800

    4832a800 : 00000010

    #

    # in32 0x4832A810

    4832a810 : 00000001

    #

    # in32 0x4832A814

    4832a814 : 00000001

     

    # in32 0x4832A840 22

    4832a840 : 00000002

    4832a844 : 00000000

    4832a848 : 00000000

    4832a84c : 00000000

    4832a850 : 00000000

    4832a854 : 00000000

    4832a858 : 00000000

    4832a85c : 00000000

    4832a860 : 00310000

    4832a864 : 00000000

    4832a868 : 00000000

    4832a86c : 00000000

    4832a870 : 00000000

    4832a874 : 00000000

    4832a878 : 00310000

    4832a87c : 00000000

    4832a880 : 00000000

    4832a884 : 00000000

    4832a888 : 00000000

    4832a88c : 00000000

    4832a890 : 00000000

    4832a894 : 00000000


    Thanks!

  • 0
    TI__Mastermind 22946 points
    Can you try enabling the FIFOMERGE field

    <register>.<field>: DISPC_CONFIG.FIFOMERGE
    FIFOMERGE FIFO merge control
    0x0: FIFO merge disabled.Each FIFO is dedicated to one pipeline.
    0x1: FIFO merge enabled. All the FIFOS are merged into a single one to be used by the single active pipeline.

    Typically SYNCLOST is preceded by UNDERFLOW interrupt and that indicates a BW problem. We do not see the UNDERFLOW interrupt triggered, which is strange. Can you confirm that the UNDERFLOW interrupts are indeed enabled and not triggered?. The relevant registers are,
    DISP_IRQENABLE. VID1FIFOUNDERFLOW
    DISP_IRQENABLE. GFXFIFOUNDERFLOW

    Regards,
    Manisha
  • 0 in reply to Manisha Agrawal
    Prodigy 80 points

    Hi Manisha,

    After enabling DISPC_CONFIG.FIFOMERGE, I don't see SYNC_LOST error message anymore and I can see the picture on the LCD but the frame-rate is very slow ---- around 8 FPS. I tried to adjust clock but it does not help.

    Do you have any idea on this ? This may be related to the FIFO-underflow theory that you suspected? 

    By the way, the LCD is very dim as well --- it may be unrelated and we are reviewing the backlight enabling part (pinmux) now. The below is the current method for backlight enabling ---

    out32 0x44E07134 0xFFFFFF7F

    out32 0x44E07194 0x80

    Thanks for your help,

    Xiaoyong

  • 0 in reply to Xiaoyong Sun
    TI__Mastermind 22946 points

    Reduced frame rate points to some issue in the incoming clock (DSS1_ALWON_FCLK) frequency.

    Can you recheck the DPLL4 (DPLL4_ALWON_FCLK) and the values of Multipliers and Dividers (M,N,M2).

     

    Is it possible for you to probe the PCLK (Pixel Clock) coming out of DSS on an Oscilloscope and measure the frequency? They should be seeing 37.5MHz

  • 0 in reply to Manisha Agrawal
    Prodigy 80 points

    Thanks Manisha.

    We are in reviewing the clock tree and did not find any thing different from Linux --- we may have to set up a scope.

    Another question is regarding to backlights. We are using (based on our understandings) the below methods to enable backlight but it does not work:

    P12 of Am437x schemtics: LCD_BACKLIGHT: GPIO0_7 

    We already set this pin mux in startup yet, just its comments is not correct. I will correct it later.

    0x44E10964:0x00000007

    set GPIO0_7 output and high:

    0x44E07134: 0xFFFFFF7F

    0x44E07194: 0x80  

    The Linux does not even configure these registers and the backlight is ON. Could you please provide a correct way to enable backlights? 

    Thanks,

    Xiaoyong

  • 0 in reply to Xiaoyong Sun
    TI__Mastermind 22946 points
    Please check that PWM and ECAP PWM support is enabled in the kernel config file. Make sure ecap is enabled in dts file (status=okay) as below -
    &ecap0 { status = "okay"; pinctrl-names = "default";
    pinctrl-0 = <&ecap0_pins>;};
    Now to change the brightness, use sysfs entries -
    echo 8 > /sys/devices/backlight.10/backlight/backlight.10/brightness