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TMS320DM6467T

Other Parts Discussed in Thread: TMS320DM6467T

Hi

For the TMS320DM6467T processor 

1) What should be the DSP_EMU0 and DSP_EMU1 pin values be in JTAG mode and non JTAG mode ?

2) In the TMS320DM6467T DSP what are the GPIO's which arm can access and what are the GPIO's which DSP can access?

In the table 3-29 on page 70 of the TMS320DM6467T data sheet, it says
"The DM6467T device does not support GP[47:43], GP[35:34], GP[31:27], GP[15:14], and GP[9] signals (not pinned out).
GP[7:0] pins have dedicated ARM926 and DSP interrupts. When PCI is used, GP[19:16] pins are reserved."
 Does this mean ARM and DSP can access all GP[7:0]  and the rest of them can be accessed only by ARM?

Let me know

ANS

 

  • ANS said:
    1) What should be the DSP_EMU0 and DSP_EMU1 pin values be in JTAG mode and non JTAG mode ?

    If you are not using JTAG than the state of the EMU pins on this particular device does not really matter, in general I would recommend pulling them high to enable JTAG debug for both the ARM and DSP core as per table 26 of the EVM tech reference.

    ANS said:
    2) In the TMS320DM6467T DSP what are the GPIO's which arm can access and what are the GPIO's which DSP can access?

    The GPIO peripheral is an independent (though slave) entity on the internal bus of the DM6467, so GPIOs could be accessed by any bus master capible of accessing the GPIO registers. I am of the impression that the DSP is not meant to access the GPIO registers, so any GPIOs having any relation to the DSP would be set up by the ARM, I say this because the entry for the GPIO registers in the C64x+ column of table 3-4 of the datasheet is empty. Though that implies that that section of the memory map is not for use by the C64x+ DSP, it is somewhat ambiguous since it does not say reserved or the function explicitly. You may be able to access it from the DSP, but as the table does not show it being supported, I would not outright recommend it.

    From an interrupt perspective, the interrupts available to the C64x+ DSP are given in 7-25 of the datasheet, which do include GPIO[7:0], no other GPIO are mentioned so I suspect only those GPIO are available for interrupts, regardless of which bus master configured the GPIO peripheral. On the other hand the ARM has GPIO bank interrupts available to it, so you could say that your statement:

    ANS said:
     Does this mean ARM and DSP can access all GP[7:0]  and the rest of them can be accessed only by ARM?

    is true, from an interrupt perspective.

  • Thanks for the reply Bernie. We will be using the JTAG Emulator pins, in such case what should be the values set to?

    ANS

  • You probably want to pull them high if you are using the JTAG interface, since that enables ARM and DSP debugging, unless your tools (emulator, software; likely alternative ARM tools) require them to be low for some reason.