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What are the changes required when moving from AM335x 300Mhz to AM335x 600Mhz on the same board?

Other Parts Discussed in Thread: AM3352

Hello Experts,

We are using BBB based custom board with AM3352BZCE30(300Mhz).

We are planning to replace it with AM3352BZCED60(600Mhz).

Broadly, we might have to look at following,

1. Changing PLL configuration/initialization in the SPL/U-Boot.

2. Changing devicetree to use correct clock.(this might not be required.)

3. We also want to clock DDR(MT41K256M16) also to higher frequency say 600Mhz as we are increasing CPU frequency. Current configuration in the board.c file of u-boot indicates DDR is clocked at 400Mhz. ( I see call to function config_ddr with 400Mhz frequency).

Does anyone have any suggestions/correction as to where we might have to make changes?

Thank you,

Regards,

Ankur

  • Hi Ankur,
    I would like you to suggest to post your AM335x's query to SItara forum.
    Generally, here we would address generic Linux queries.
    Thanks for your understanding.

    I can also move your post to Sitara forum.
    Shall I ?
  • If you can move :) it would be easy. Thank you. I was confused as it involved both hardware as well as software.
  • Hi Ankur,
    Thanks.
    I moved your post.
    You would get response from sitara experts soon.
  • Ankur Tank said:
    3. We also want to clock DDR(MT41K256M16) also to higher frequency say 600Mhz as we are increasing CPU frequency. Current configuration in the board.c file of u-boot indicates DDR is clocked at 400Mhz. ( I see call to function config_ddr with 400Mhz frequency).

    This is not possible. 400MHz is the maximum DDR3 clock frequency that can be used on AM335X.

    As for the other questions, please post what Linux version you are using.

  • Thank you for reply Guru Biser, You won't believe but before I wrote this questions, I was thinking of asking and getting reply from you :) . Regarding Linux version, we are using 3.12 Kernel for our custom board.
  • I have asked the SW team to answer your first two questions.

  • Hi Ankur, 

    Ankur Tank said:

    1. Changing PLL configuration/initialization in the SPL/U-Boot.

    2. Changing devicetree to use correct clock.(this might not be required.)

    You won't need to change anything. Initialization sequence in spl/u-boot is common for the AM33xx devices. 

    After that the opp table is applied based on the chip mounted on your board, see arch/arm/mach-omap2/opp33xx_data.c 

    Best Regards, 

    Yordan

  • Hi Biser/Yordon,

    Thank you for reply,
    One more question, So can we assume that in kernel also we don't need to change anything ?

    Best Regards,
    Ankur
  • Hi Ankur,

    Ankur Tank said:
    One more question, So can we assume that in kernel also we don't need to change anything ?

     

    Yes, if you don't have any new peripherals added on your board.

    Best Regards, 

    Yordan

  • Hi Yordan,

    Thank you for immediate reply, I received the board with AM3352BZCED60, I will start testing with the same.

    Best Regards,
    Ankur
  • Hi Yordan,

    I cross compiled "cpufrequtils" and I was able to test it on both the boards, I got below output for the same,

    AM3352BZCE30(300Mhz)

    # cpufreq-info
    cpufrequtils 007: cpufreq-info (C) Dominik Brodowski 2004-2009
    Report errors and bugs to cpufreq@vger.kernel.org, please.
    analyzing CPU 0:
      driver: generic_cpu0
      CPUs which run at the same hardware frequency: 0
      CPUs which need to have their frequency coordinated by software: 0
      maximum transition latency: 300 us.
      hardware limits: 300 MHz - 300 MHz
      available frequency steps: 300 MHz
      available cpufreq governors: performance
      current policy: frequency should be within 300 MHz and 300 MHz.
                      The governor "performance" may decide which speed to use
                      within this range.
      current CPU frequency is 300 MHz (asserted by call to hardware).
      cpufreq stats: 300 MHz:100.00%


    AM3352BZCED60(600Mhz)

    # cpufreq-info  
      cpufrequtils 007: cpufreq-info (C) Dominik Brodowski 2004-2009
    Report errors and bugs to cpufreq@vger.kernel.org, please.
    analyzing CPU 0:
      driver: generic_cpu0
      CPUs which run at the same hardware frequency: 0
      CPUs which need to have their frequency coordinated by software: 0
      maximum transition latency: 300 us.
      hardware limits: 300 MHz - 600 MHz
      available frequency steps: 300 MHz, 600 MHz
      available cpufreq governors: performance
      current policy: frequency should be within 300 MHz and 600 MHz.
                      The governor "performance" may decide which speed to use
                      within this range.
      current CPU frequency is 600 MHz (asserted by call to hardware).
      cpufreq stats: 300 MHz:0.00%, 600 MHz:100.00%  (1)

    To me this output looks good, what do you say ?

    I have two more questions on this, I promise these are last set of questions ;) :P

    1. If we move to higher Linux version do we need to make any changes in the board containing AM3352BZCED60(600Mhz), I thought of asking this because Biser asked me for which Linux version we are using. OR was handling different in older Linux version ?

    2. I could print the frequency of the CPU using cpufrequtils, is there any utility or sysfs/procfs file to get DDR frequency ?

    Thank you,


    Best Regards,

    Ankur


     

  • Hi Ankur,

    Ankur Tank said:
    1. If we move to higher Linux version do need to make any changes in the board containing AM3352BZCED60(600Mhz), I thought of asking this because Biser asked me for which Linux version we are using. OR was handling different in older Linux version ?

     

    You shouldn't have problem with transitioning to a newer TI SDK (i.e. from SDK7, kernel 3.12 to SDK8, kernel 3.14 or SDK1, kernel 3.14). I cannot guarantee for the community releases. 

    Ankur Tank said:
    2. I could print the frequency of the CPU using cpufrequtils, is there any utility or sysfs/procfs file to get DDR frequency ?

    You could use devmem2 to see the PRCM settings for DDR frequency, and calculate the clock from there. But I am not aware of such utility. 

    Best Regards, 

    Yordan

  • Hi Yordan,

    I realize that this post is a bit old at this point, but I am confused by the file that you referenced. Unless I am mistaken, the "arch/arm/mach-omap2/opp33xx_data.c" file does not appear in the 3.12 kernel sources (either mainline or the TI tree - git.ti.com/.../. Am I missing something? I do see it in the TI 3.14 version however. In the 3.12 kernel, does it use the "opp3xxx_data.c" file to setup the operating power modes instead (and thus the process speed)? If so, it seems wrong as it defaults to omap34xx modes which don't look right for a AM3352 processor (especially the 600MHz flavor).

    Additionally, while this code sets up the operating modes table, its not clear to me which one is selected by default if you were to disable CPU frequency utilities in your kernel. Any insight on this would be greatly appreciated.

    Thanks,
    Parker
  • Hi Parker,

    Sorry, indeed opp33xx_data.c file is relevant to kernel 3.14.
    In 3.12 release the opps are defined in arch/arm/boot/dts/am33xx.dtsi:
    cpus {
            #address-cells = <1>;
            #size-cells = <0>;
            cpu@0 {
                    compatible = "arm,cortex-a8";
                    device_type = "cpu";
                    reg = <0>;

                    /*
                     * To consider voltage drop between PMIC and SoC,
                     * tolerance value is reduced to 2% from 4% and
                     * voltage value is increased as a precaution.
                     */
                     operating-points = <
                                         /* kHz uV */
                                    1000000 1351000
                                    800000 1285000
                                    720000 1285000
                                    600000 1225000
                                    500000 1125000
                                    300000 1125000
                                    275000 1125000
                     >;

                    voltage-tolerance = <2>; /* 2 percentage */

                    platform-opp-modifier = <&mpu_opp_modifier>;

                    clocks = <&dpll_mpu_ck>;
                    clock-names = "cpu";

                    clock-latency = <300000>; /* From omap-cpufreq driver */
           };
    };

    Best Regards,
    Yordan

  • Yordan,

    Thank you for your reply. This makes a bit more sense to me now.

    However, I still am unsure of two things:

    1) This table specifies an operating point for 600MHz operation of 1.225V (I assume this is expected VDD_MPU) but newer ZCE parts allow 1.1V at OPP100. Will this cause any issues if we are actually operating at 1.1V?

    2) If I didn't compile in the CPU frequency utilities into the kernel or RFS, what operating mode will the kernel default to? Will it be the lowest operating mode (275MHz??). I can't seem to track down where in the kernel the OPP is actually selected and defaulted. Any help in pointing out this location would be greatly appreciated.

    Thanks,
    Parker
  • Hi,

    Related files are:
    arch/arm/boot/dts/include/dt-bindings/opp/am33xx.h
    drivers/cpufreq/cpufreq-cpu0.c
    drivers/power/opp/core.c
    drivers/power/opp/omap-opp-control.c

    Some documentation may be found in Documentation/devicetree/bindings/power/

    Best Regards,
    Yordan