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Reading vendor ID and BARS remote device (EP) over PCIe link

FADIL Said
Prodigy 80 points

HI,

Please ,I communicate tow  platforms evm6678L with PCIe protocol generation 3 using the BOC ,I try to read the vendor ID and BARS of EP from the RC  but me give incorrect values .

THANKS,

  • 0
    TI__Mastermind 28085 points
    Hi,

    Have you running MCSDK PCIe example code on both DSP's?

    In the MCSDK PCIe sample example, two DSP EVMs are used to test the PCIe driver. DSP 1 is configured as a Root Complex and DSP 2 is configured as End Point. Once the PCIe link is established, the following sequence of actions will happen:

    1. DSP 1 sends data to DSP 2 - DSP 2 waits to receive all the data

    2. DSP 2 sends the data back to DSP 1

    3. DSP 1 waits to receive all the data

    4. DSP 1 verifies if the received data matches the sent data and declares test pass or fail.

    Have you confirm the PCIe link up between two DSP's? After link up you can read the vendor ID and BARS information of EP device from RC side via PCIe configuration address space(0x2180 1000 - 0x2180 103F).

    Please go through below wiki for PCIe related FAQs and Resources.
    processors.wiki.ti.com/.../PCI_Express_(PCIe)_Resource_Wiki_for_Keystone_Devices

    Thanks,
  • 0 in reply to Ganapathi Dhandapani95
    Prodigy 80 points
    HI,

    I succeed the memory transactions type Read/Write but the configuration transactions type read and write do not pass.

    Thanks,

    Fadil,
  • 0 in reply to FADIL Said
    TI__Mastermind 28085 points

    Hi,

    Have you running MCSDK PCIe example code on both DSP's?

    TI has validated the PCIe example between two EVM's, it is working fine. Refer the attached PCIe example test log file.

    PCIe_test_log.txt 
    [C66xx_0] **********************************************
**********************************************
*             PCIe Test Start                *
*             PCIe Test Start                *
*                RC mode                     *
*                EP mode                     *
**********************************************
**********************************************


Version #: 0x01000003; string PCIE LLD Revision: 01.00.00.03:Nov 19 2012:16:03:31
Version #: 0x01000003; string PCIE LLD Revision: 01.00.00.03:Nov 19 2012:16:03:31


Power domain is already enabled.  You probably re-ran without device reset (which is OK)
Power domain is already enabled.  You probably re-ran without device reset (which is OK)
PCIe Power Up.
PCIe Power Up.
PLL configured.
PLL configured.
Successfully configured Inbound Translation!
Successfully configured Inbound Translation!
Successfully configured Outbound Translation!
Successfully configured Outbound Translation!
Starting link training...
Starting link training...
Link is up.
Link is up.
End Point received data.
End Point sent data to Root Complex, completing the loopback.
End of Test.
Root Complex received data.
Test passed.

    Thanks,

  • 0 in reply to Ganapathi Dhandapani95
    Prodigy 80 points
    HI,

    Now ,I try to communicate a FPGA Cyclone IV (EP) to a DSP C6678 (RC) using a PCIe Switch, I use the PCIe Hard IP and Avalon-MM , I need to configure the FPGA BARs in order to accept the TLPs sent by DSP, how to perform a configuration transaction type ?

    Thanks,

    Fadil,
  • 0 in reply to FADIL Said
    TI__Mastermind 28085 points

    Hi,

    In the MCSDK PCIe sample example, two DSP EVMs are used to test the PCIe driver. DSP 1 is configured as a Root Complex and DSP 2 is configured as End Point. The MCSDK example not directly support to your requirement.

    TI not provide PCIE RC enumeration software. User need to develop the software. Please take a look at PCIe user guide and develop your test application for DSP to FPGA pcie communication via pcie switch.

    Thanks,