HI
I am trying to specify a linker command file for the C6748 DSP on the lcdk board. I am using the latest RTOS and xdc package etc. However when I specify a linker command file it conflicts with the auto generated linker commands from the package. I am trying to allocate some buffers in L2 Ram on the DSP. Sounded simple enough to me...but I am mistaken.
Can someone please point me to some documentation on this? Everything is such a mess with the documentation. The linker commands are stuck in an assembly manual which seems to be an out dated way to do with CCS and xgconfig etc.
The processor is awesome but the tools are so buggy and the documentation is all over the place. I am spending hours trying to find out bits of information.
I think I am about to throw in the towel on this as we will never get the project done on time. TI has created a monster I think and it will take a good year or two to just to sort out the information and have sufficient information to do something meaningful. I spent over a week debugging a buffer problems with edma and asked for support....none mentioned that it could be cache coherence problem as everything is allocated in DDR. Anyway I find this information stuck in the cache manual. This is such an obvious gotcha for newbies and should have been highlighted in other docs. Now I am trying to allocate memory in L2 which should be a simple task. It seems I will have to wade through tons of docs to find out the required information.
Will try another week or so before giving up. I think I am going to an ARM M4 which has got floating point processor in it. Such a shame as I was having high hopes for this DSP :(((
Regards
Manjula