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Ethernet driver problems with C6748

Hello

We are working with the C6748 which is connected to a Powerquick host  processor through a Lanswitch.

The DSP is a slave and does not have access to PHY (MDIO) which is handled by the Host software.

We are trying to develop a thin ip stack/ethernet driver that supports ARP/ICMP/UDP (no sockets single user)

We have checked all the existing samples codes of the bsl EMAC drivers. Some of them are not working and in others we have problems :

1) We are not getting any Rx/Tx Hw interrupts.

2) When trying to work in polling mode through a periodic (PRD) which triggers our Rx receiver, the period stop firing

if the period is 200 microseconds.

please your help about these issues.

Thanks

Roni Gotman

  • Roni,

    Were you using the Logic PD BSL test for EMAC as a reference?  That test is only intended to check for board functionality -- it is not a driver and does not support interrupts or any realistic Tx/Rx.

    Can you elaborate on your PRD polling method?

    -Tommy

  • Hi Tommy

    The reference we are using is :

    lib:  evmc6748_v1
    file: evmc6748_v1\bsl\src\evmc6748_emac.c

    1) We saw that this "driver" code handles only "one packet at a time transmission " i.e it does not contain handling a case in which
    two packets are sent one right after the other. (It always creates a list with one buffer descriptor).
    2) It does not contain critical sections protection.

    3) About the PRD :
    Every 250 microsecond the periodic timer triggers our Rx SWI. the Rx SWI calls the drivers
    EMAC_rxPacket function in a loop until the Buffer Descriptors queue is empty.
    Now we are disabling the interrupts before calling to EMAC_rxPacket
    and enabling them after it. Without the enable/disable - the PRD stops firing from some reason.

    4) To avoid using the PRD we tried to use the ethernet Rx HW Interrupt (event 27) but it never fires
    when packets arrive (the RXCONTROL indicates that packets arrive).

    5) Also Tx Hw interrupt does not work.

    Thank you very much
    Roni




  • Roni,

    That test code is only designed to verify the EMAC->PHY loopback datapath.  It does not enable, use, or acknowledge interrupts.  The test uses register polling to determine if a single packet has been transmitted and received through PHY loopback:  evmc6748_v1\tests\experimenter\emac_loopback_mii

    If you are already using BIOS, the NDK (links below) may be a better option to try or use as a reference:

    http://processors.wiki.ti.com/index.php/GSG_C6748:_Installing_the_SDK_Software
    http://software-dl.ti.com/dsps/dsps_public_sw/sdo_sb/targetcontent/omap_l138/1_00/latest/index_FDS.html

    -Tommy

  • Tommy

    The NDK code does not work in our case because the DSP is a slave and only the Host has access to MDIO registers (PHY).

    In the NDK ethernet driver there is a flag "useMdio"  which is hard coded set to 1. (This flag is checked in file cls_emac.c and is ignore in

    file ethernet.c) We have tried to disable the PHY accesses but after we did that,  things are not working because the driver has handshakes with the PHY.

     

    (About the the periodic function problem  (when using polling method) we have solved it by using Timer0 instead of timer Timer1.

    But we still would like to make use of the Rx/Tx interrupts.

    Roni

  • Roni,

    I have not studied the NDK driver so I will leave it up to you to decide if it is easier to remove all MDIO checks (MDIO is not necessary to use EMAC) from the NDK or start a new BIOS driver from scratch.

    If you want to enable the interrupts, be sure to configure the EMAC INTCONTROL, CnRXTHRESHEN, CnRXEN, CnTXEN, CnMISCEN, RXINTMASKSET, TXINTMASKSET, and MACINTMASKSET registers as desired.

    -Tommy

  • Thanks Tommy

    We will try to check if all the above registers setings are OK.

    Roni