I have a hard time understanding the interrupt handling on the Jacinto 5/6 boards.
I use the Jac 5 ref manual (SPRUGI5C) and datasheet (SPRS694B) but cannot grasp how it works.
I have gotten the SPI unit itself to work and can log the expected signals on an oscilloscope and I can communicate with EEPROM via SPI.
Now I want some interrupts. I enable the interrupts for the SPI1 module:
#define MCSPI_IRQ_ENABLE_REG0_MASK 0xFuL
#define MCSPI_IRQ_ENABLE_REG1_MASK (0x7uL << 4uL)
#define MCSPI_IRQ_ENABLE_REG2_MASK (0x7uL << 8uL)
#define MCSPI_IRQ_ENABLE_REG3_MASK (0x7uL << 12uL)
#define MCSPI_IRQ_ENABLE_EOWKE_MASK (1uL << 17uL)
#define MCSPI_IRQ_ENABLE_MASK (MCSPI_IRQ_ENABLE_REG0_MASK | \
MCSPI_IRQ_ENABLE_REG1_MASK | \
MCSPI_IRQ_ENABLE_REG2_MASK | \
MCSPI_IRQ_ENABLE_REG3_MASK | \
MCSPI_IRQ_ENABLE_EOWKE_MASK)
In code I do:
*Spi_HwRegs[1].MCSPI_IRQENABLE = MCSPI_IRQ_ENABLE_MASK;
And before that I have installed ISR but that is the part that I am uncertain about.
Do I need to mux SPI1? How do I do that then?
What is the nbr/index of the SPI1 interrupt? I have found a little different ones and I have old code that says something that I cannot find in the datasheets at all.
SPI1 interrupt:
125 (page 236 SPRS694B datasheet)
Then the datasheet says something about "C674x DSP Interrupts" which is irrelevant I guess?
Then comes the "GP-M3 Interrupts" and then there is also "Table 7-34. External Bundle Interrupt Sources".
Which of these do I need to look at?
I want to be able user ISRs for SPI 1 to 4 (all units).
