Hi -
Super newbie here, so be kind :).
In comparing the published benchmarks of DSPLIB routines (from ... dsplib_c66x_3_1_0_0/docs/DSPLib_c66xTest_Report.html) to the provided examples ( from dsplib_c66x_3_1_0_0/packages/ti/dsplib/src) ... an example running on a TMDXEVM6678L doesn't even come close to the published results ... but I may be completely misunderstanding something.
For example, for the routine DSP_mat_mul:
CYCLES (from Test_Report): 2/8*r1*c2*c1 + 22/8*r1*c2 + 38/8*c2 + 17
Results from running the example from dsplib_c66x_3_1_0_0/packages/ti/dsplib/src/DSP_mat_mul:
[C66xx_1_0] DSP_mat_mul Iter#: 1 Result Succesful (r_i) R1 = 8 C1R2 = 8 C2 = 4 natC: 10860 intC: 4110
[C66xx_1_0] DSP_mat_mul Iter#: 2 Result Succesful (r_i) R1 = 8 C1R2 = 8 C2 = 8 natC: 21317 intC: 8123
[C66xx_1_0] DSP_mat_mul Iter#: 3 Result Succesful (r_i) R1 = 8 C1R2 = 8 C2 = 12 natC: 31813 intC: 12166
[C66xx_1_0] DSP_mat_mul Iter#: 4 Result Succesful (r_i) R1 = 8 C1R2 = 8 C2 = 16 natC: 42309 intC: 16209
The calculated # of cycles is about 20-30 times less than the measured. I guess I assumed the published examples would be closer (I used the provided GEL file).
Suggestions?
Ned A.