Buid error in adding NDK to existing project

/*
 *  ======== main.c ========
 */

#include <xdc/std.h>

#include <xdc/runtime/Error.h>
#include <xdc/runtime/System.h>

#include <ti/sysbios/BIOS.h>

#include <ti/sysbios/knl/Task.h>

// added ByPark
#include <ctype.h>
#include <ti/ndk/inc/netmain.h>
#include <xdc/runtime/Memory.h>
#include <ti/sysbios/family/c64p/Hwi.h>
#include <ti/sysbios/knl/Swi.h>
#include <ti/sysbios/family/c66/tci66xx/CpIntc.h>
#include <ti/csl/csl_gpio.h>
#include <ti/csl/csl_gpioAux.h>
/* NIMU */
#include "ti/transport/ndk/nimu/nimu_eth.h"
#include "ti\platform\platform.h"
#include "ti\platform\resource_mgr.h"
#include "ti/csl/cslr_uart.h"
#include "ti\platform\evmc6678l\platform_lib\include\evmc66x_uart.h"
#include "ti\platform\evmc6678l\platform_lib\include\evmc66x_gpio.h"
//#define CSL_UART_REGS 0x02540000
#define hUartRegs ((CSL_UartRegs*)	CSL_UART_REGS)
#define GPIO_CFG_BASE				(0x02320000)
#define GPIO_REG_BINTEN				(0x8)
#define GPIO_REG_DIR				(0x10)
#define GPIO_REG_OUT_DATA			(0x14)
#define GPIO_REG_SET_DATA			(0x18)
#define GPIO_REG_CLR_DATA			(0x1C)
#define GPIO_REG_IN_DATA			(0x20)
#define GPIO_REG_SET_RIS_TRIG		(0x24)
#define GPIO_REG_CLR_RIS_TRIG		(0x28)
#define GPIO_REG_SET_FAL_TRIG		(0x2C)
#define GPIO_REG_CLR_FAL_TRIG		(0x30)

#define NOR_DEVICE					PLATFORM_DEVID_NORN25Q128;

unsigned int GPIO_INT_DONE = 0;

Void HWI_UART_Handler(UArg arg);
Void HWI_GPIO_Handler(UArg arg);
void SWI_UART_Handler();
void SWI_GPIO_Handler();
void UART_Idle_Handler();
void SPI_NOR_Read(/*int length*/);

extern Swi_Handle uartSwiHandle;
extern Swi_Handle gpioSwiHandle;

unsigned int Uart_Interrupt_Received_Flag = 0;
static char cmdString[30];
static unsigned int cmdStringPtr = NULL;

/* OSAL functions for Platform Library */
uint8_t *Osal_platformMalloc (uint32_t num_bytes, uint32_t alignment)
{
	return malloc(num_bytes);
}

void Osal_platformFree (uint8_t *dataPtr, uint32_t num_bytes)
{
	/* Free up the memory */
	if (dataPtr)
	{
		free(dataPtr);
	}
}

void Osal_platformSpiCsEnter(void)
{
	/* Get the hardware semaphore.
	 *
	 * Acquire Multi core CPPI synchronization lock
	 */
	while ((CSL_semAcquireDirect (PLATFORM_SPI_HW_SEM)) == 0)
		;
	return;
}

void Osal_platformSpiCsExit (void)
{
	/* Release the hardware semaphore
	 *
	 * Release multi-core lock.
	 */
	CSL_semReleaseSemaphore (PLATFORM_SPI_HW_SEM);
	return;
}

/*
 *  ======== taskFxn ========
 */
//Void taskFxn(UArg a0, UArg a1)
//{
//    System_printf("enter taskFxn()\n");
//
//    Task_sleep(10);
//
//    System_printf("exit taskFxn()\n");
//}

/*
 *  ======== main ========
 */
Void main()
{ 
	int i=0;

    System_printf("enter main()\n");

	// enable ERBI & ELSI of IER for UART
    CSL_FINS (hUartRegs->IER, UART_IER_ERBI,  CSL_UART_IER_ERBI_ENABLE);
    CSL_FINS (hUartRegs->IER, UART_IER_ELSI,  CSL_UART_IER_ELSI_ENABLE);
    // mapping system interrupt(148) to host interrupt(32)
    CpIntc_mapSysIntToHostInt(0,148,32);
    CpIntc_dispatchPlug(148, &HWI_UART_Handler,0, TRUE);
    CpIntc_enableHostInt(0,32);
    CpIntc_clearSysInt(0,148);

    //set GPIO_0 pin as an input
    *(unsigned int*)(GPIO_CFG_BASE+GPIO_REG_DIR) |= 0x1;
    //set falling edge to trigger GPIO_0 interrupt
    *(unsigned int*)(GPIO_CFG_BASE+GPIO_REG_SET_FAL_TRIG) |= 0x1;
    //clear rising edge trigger of GPIO_0 interrupt
    *(unsigned int*)(GPIO_CFG_BASE+GPIO_REG_SET_RIS_TRIG) &= 0xFFFFFFFE;
    //enable GPIO interrupts
    *(unsigned int*)(GPIO_CFG_BASE+GPIO_REG_BINTEN) |= 0x1;

    for(i=0;i<4;i++)
		platform_led(i, PLATFORM_LED_OFF, PLATFORM_USER_LED_CLASS);

    platform_write("\nStart BIOS 6\n");
	platform_write("NARA DSP Platform Started.\n");

	memset(cmdString, 0, /*sizeof(memset)*/30);
	cmdStringPtr = NULL;

    BIOS_start();     /* enable interrupts and start SYS/BIOS */
}

/*************************************************************************
* EVM_init()
* Initializes the platform hardware. This routine is configured to start in
* the evm.cfg configuration file. It is the first routine that BIOS
* calls and is executed before Main is called. If you are debugging within
* CCS the default option in your target configuration file may be to execute
* all code up until Main as the image loads. To debug this you should disable
* that option.
************************************************************************/
void EVM_init()
{
	platform_init_flags sFlags;
	platform_init_config sConfig;
	int32_t pform_status;
	/* Initialize the UART */
	platform_uart_init();
	platform_uart_set_baudrate(115200);
	(void) platform_write_configure(PLATFORM_WRITE_ALL);
	/*
	* You can choose what to initialize on the platform by setting the following
	* flags. Things like the DDR, PLL, etc should have been set by the boot loader.
	*/
	memset( (void *) &sFlags, 0, sizeof(platform_init_flags));
	memset( (void *) &sConfig, 0, sizeof(platform_init_config));
	sFlags.pll = 0;		/* PLLs for clocking */
	sFlags.ddr = 0;		/* External memory */
	sFlags.tcsl = 1;	/* Time stamp counter */
	sFlags.phy = 0;		/* Ethernet */
	sFlags.ecc = 0;		/* Memory ECC */
	sConfig.pllm = 0;	/* Use libraries default clock divisor */
	pform_status = platform_init(&sFlags, &sConfig);
	/* If we initialized the platform okay */
	if (pform_status != Platform_EOK)
	{
		/* Initialization of the platform failed... die */
		platform_write("Platform failed to initialize. Error code %d \n", pform_status);
		platform_write("We will die in an infinite loop... \n");
		while (1)
		{
			(void) platform_led(1, PLATFORM_LED_ON, PLATFORM_USER_LED_CLASS);
			(void) platform_delay(50000);
			(void) platform_led(1, PLATFORM_LED_OFF, PLATFORM_USER_LED_CLASS);
			(void) platform_delay(50000);
		}
	}

	return;
}

Void HWI_UART_Handler(UArg arg)
{
//	static int LED0_state = 0;
//	uint8_t UART_Byte_Recv;

	Swi_post(uartSwiHandle);

//	CpIntc_clearSysInt(0,148);
//	UART_Byte_Recv=UartReadData();
//	if(LED0_state)
//		platform_led(0, PLATFORM_LED_ON, PLATFORM_USER_LED_CLASS);
//	else
//		platform_led(0, PLATFORM_LED_OFF, PLATFORM_USER_LED_CLASS);
//	LED0_state ^= 1;
}

Void HWI_GPIO_Handler(UArg arg)
{
	Swi_post(gpioSwiHandle);
}

void SWI_UART_Handler()
{
	static int LED0_state = 0;

	Uart_Interrupt_Received_Flag = 1;

	CpIntc_clearSysInt(0,148);

	if(LED0_state)
		platform_led(0, PLATFORM_LED_ON, PLATFORM_USER_LED_CLASS);
	else
		platform_led(0, PLATFORM_LED_OFF, PLATFORM_USER_LED_CLASS);
	LED0_state ^= 1;
}

void SWI_GPIO_Handler()
{
	static int LED2_state = 0;

	Uart_Interrupt_Received_Flag = 2;

	if(LED2_state)
		platform_led(2, PLATFORM_LED_ON, PLATFORM_USER_LED_CLASS);
	else
		platform_led(2, PLATFORM_LED_OFF, PLATFORM_USER_LED_CLASS);
	LED2_state ^= 1;
}

void CLK_LED_Handler(void)
{
	static int LED1_state = 0;

	if(LED1_state)
		platform_led(1, PLATFORM_LED_ON, PLATFORM_USER_LED_CLASS);
	else
		platform_led(1, PLATFORM_LED_OFF, PLATFORM_USER_LED_CLASS);

	LED1_state ^= 1;
}

void UART_Idle_Handler()
{
	uint8_t UART_Byte_Recv;
	unsigned int indata;

	switch(Uart_Interrupt_Received_Flag)
	{
	case 1:
		Uart_Interrupt_Received_Flag = 0;
		UART_Byte_Recv=UartReadData();
		if(UART_Byte_Recv==0xD) {
			platform_uart_write(0xA);
			platform_uart_write(UART_Byte_Recv);

			if(strncmp("NOR read", cmdString, 8)==0) {

				SPI_NOR_Read();
				platform_uart_write(0xA);	// LF
				platform_uart_write(0xD);	// CR
			}

			memset(cmdString, 0, /*sizeof(memset)*/30);
			cmdStringPtr = 0;
		}
		else {
			platform_uart_write(UART_Byte_Recv);
			cmdString[cmdStringPtr++] = UART_Byte_Recv;
		}
		break;
	case 2:
		Uart_Interrupt_Received_Flag = 0;
		// read GPIO_0 status
		indata = gpioReadInput(GPIO_0);
		if(indata)
			platform_write("\nGPIO(0) high\n");
		else
			platform_write("\nGPIO(0) low\n");
		break;
	default:
		break;
	}
}

void SPI_NOR_Read(/*int length*/)
{
	int32_t					block, page;
	uint32_t				deviceid;
//	uint32_t				flash_selection = NULL;
	uint32_t				offset;
	uint8_t					*buffer = NULL;
	PLATFORM_DEVICE_info	*p_device = NULL;
	Error_Block				errorBlock;
	int						i;

	deviceid = NOR_DEVICE;

	p_device = platform_device_open(deviceid, 0);
	if(p_device==NULL) {
		platform_write("\nUnable to open NOR Flash\n");
		goto READ_DONE;
	}

	buffer = (uint8_t *) Memory_alloc( NULL, platform_roundup(p_device->page_size, PLATFORM_CACHE_LINE_SIZE), PLATFORM_CACHE_LINE_SIZE, &errorBlock);
	if(!buffer) {
		platform_write("Unable to allocate memory to read NOR flash\n");
		goto READ_DONE;
	}

	memset(buffer, 0, p_device->page_size);
	block = 0;
	page = 0;

	platform_blocknpage_to_offset(p_device->handle, &offset, block, page);

	platform_device_read(p_device->handle, offset, buffer, p_device->page_size);

	for(i=0;i<128;i++)
	{
		platform_write("%02X", buffer[i]);
	}

READ_DONE:
	if(buffer)
		Memory_free(NULL, buffer, platform_roundup(p_device->page_size, PLATFORM_CACHE_LINE_SIZE));

	if(p_device!=NULL)
		platform_device_close(p_device->handle);

	return;
}