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C667x DDR3 design requirements - trace length between Address/cmd trace and Termination resistor?

AnBer
Mastermind 30170 points

Team ,

Looking at the DDR3 Design Requirements for KeyStone Devices sprabi1b:
   http://www.ti.com/lit/an/sprabi1b/sprabi1b.pdf 
- There does not seem to be specific requirement for the trace length between CMD/ADDR and termination resistors network. Correct?

- sprabi1b does not provide precise guidelines on decoupling cap.
Can the Sitara guideline be used as general guideline for this?
http://processors.wiki.ti.com/index.php/General_hardware_design/BGA_PCB_design/BGA_decoupling
or are there restrictions since the Sitara DDR3 is slower and the power consumption is lower compared to KI and KII devices?

Thanks in advance,

Anthony

  • 0
    TI__Mastermind 43660 points
    Hello AnBer,

    Yes, there is no specific guideline provided for the trace length between CMD/ADDR and termination resistors network. You may need to place it as close as possible.

    For decoupling capacitors, you can refer the hardware design guideline document SPRABV0 section 2 for specific recommendations.

    Regards,
    Senthil