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C6670 CSL timer example

Other Parts Discussed in Thread: TMS320C6670

Hello,

i am trying to port the timer_test example (pdk_C6678_1_1_2_6\packages\ti\csl\example\timer) from C6678 to C6670. I have copied the timer_test.c to a C6670 project and created a C6670 cmd file. All sections are mapped to L2_SRAM. Also the C6670 header (pdk_C6670_1_1_2_6\packages) and libraries (ti.csl.ae66 and ti.csl.intc.ae66) have been added to the project.

The program compiles without warnings or errors.

The problem is when i run the program on the first core the interrupt is never serviced, so the program is stuck at "while (timerISRCounter != 1);".

Any suggestions?

  • I forgot to mention that I use the "TMDSEVM6670L - TMS320C6670 Lite Evaluation Module"
    www.ti.com/.../TMDSEVM6670
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  • Hi,

    I have executed the same project on C6670, it works fine with below change. As per example application code, it expects to receive 5 watchdog interrupt whereas the application receives only one interrupt.

    Below code snippet is updated in test_wd_timer(),

     /* Wait for the timer interrupts to fire; since the watchdog timers run continuously
         * we wait for at least 1 interrupt to fire... */
        while (timerISRCounter != 1);

    instead of

     /* Wait for the timer interrupts to fire; since the watchdog timers run continuously
         * we wait for at least 5 interrupts to fire... */
        while (timerISRCounter != 5);

    Please find the test log for your reference,

    [C66xx_0] **************************************************
    ****************** Timer Testing  ****************
    **************************************************
    Debug: Testing Low Timer (Unchained) in Single Shot Mode...
    Debug: Testing Low Timer (Unchained) in Single Shot Mode Passed
    Debug: Testing High Timer (Unchained) in Single Shot Mode...
    Debug: Testing High Timer (Unchained) in Single Shot Mode Passed
    Debug: Testing High Timer (Unchained) in Continuous Mode....
    Debug: Testing High Timer (Unchained) in Continuous Mode Passed
    Debug: Testing 64bit Timer in Single Shot Mode...
    Debug: Testing 64bit Timer in Single Shot Mode Passed
    Debug: Testing Timer (Chained) in Single Shot Mode....
    Debug: Testing Timer (Chained) in Single Shot Mode Passed
    Debug: Testing Watch Dog Timer...
    Debug: Testing Watch Dog Timer Passed
    **************************************************
    ************* Timer Testing Successful ***********
    **************************************************
    
    
    

    Thank you.

  • Thank you for your answer. What could be the reason that it is not working for me? Do you use a GEL file for initalization?
  • Yes. I have booted the EVM in no boot mode and used gel file for initialization.

    Thank you.
  • Hello,

    I found the error and the example is now working. Now my problem is there is some "behind the scenes" initalization, for example i suppose the Timer0 power domain is enabled. I want to find the initalizations that are important for the timer example. I tried to modify the evmc6670l.gel, but it seems to have no effect on the initalizations.


    What i want to achieve is a standalone working example of the CSL timer example. It should be obvious that an example that requires the CCS to make some initalizations will not run without the CCS, which is not useful in the long run.


    Maybe you have some suggestions on how to proceed.

  • Please refer boot examples available in MCSDK for running the examples on boot.

    The "No boot" is used to debug and run the application using CCS, that needs gel to init the PLL etc.,

    Thank you.

  • Thank you.

    One more question regarding the timer example: When I try to change CSL_TMR_10 to CSL_TMR_1 or CSL_TMR_4 the example is no longer working, timerISRCounter stays 0. The timer is set up correctly, it has to have soemthing to do with the interrupt (or ISR). Can you please give me an hint what I might have to do?