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Is it a requirement of that EDMA3 must be set up for a 1D-to-1D transfer with A-synchronization to services peripherals in the background of DSP operation?

Hello everyone

I want to perform Ping-Pang Buffering at the background of DSP operation. According to the EDMA user manual (showing below), 1D to 1D with A-synchronization is the only way to perform that.

Q1: Suppose I want to move data back and forth between L2 SRAM and DDR. My question is that what if I use AB-synchronization, does that mean DSP would stall and let EDMA finish the data transaction?

Q2: All the examples in the section 3.4 Peripheral Servicing Example uses "Data transmit/receive Register" sending data from peripheral to L2 SRAM. What is point to use a register, but not a range of memory address from DDR or from other place? Is that another requirement (useing register) to perform background EDMA transmission? If so, what are those transmit/receive registers?

Thanks in advance.

Xining

  • Hello Xining,

    We are working on this thread and get back to you soon.

    Regards,
    Senthil
  • Hi,

    Thanks for your post.

    To address your Q#1, EDMA would finish the transaction from L2SRAM to DDR & viceversa independantly without CPU intervention which mean there is no scope for DSP to stall for finishing the EDMA transaction.

    To address your Q#2, usually you would have EDMA PaRAM set uniquely mapped to each DMA channel which would identify the source address from where it should take data and the destination address to copy the data and the purpose of "Data transmit/receive Register" in EDMA which would be the place for the data to reside inorder to transmit or receive. Also, as you mentioned above, the registers are not like another requirement which you meant for and it is the same which is used for background EDMA transaction without CPU intervention.

    Thanks & regards,

    Sivaraj K

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  • Hi Sivaraj

    Thanks for your replying.

    For the first question, did you mean that I can use AB-synchronization to do transmission without interference with DSP? If so, why in the user manual it says "To transfer the incoming data stream to its proper location in L2 memory, the EDMA3 channel must be set up for a 1D-to-1D transfer with A-synchronization"

    Thanks

    Xining