K2E: DDR3 PHY rank margin testing

Hello Gunter,

We do not have such test code as a part of MCSDK. We have DDR write/read test only in platform code and GEL file.

Regards,
Senthil

Hi,

DDR3 Rank Margin testing : -

For DDR3, In uBoot, we have only the following three commands for DDR testing. We do not have anything like Rank margin testing for DDR3.

Usage:
ddr test <start_addr in hex> <end_addr in hex> - test DDR from start address to end address
ddr compare <start_addr in hex> <end_addr in hex> <size in hex> - compare DDR data of (size) bytes from start address to end address
ddr ecc_err <addr in hex> <bit_err in hex> - generate bit errors in DDR data at <addr>, the command will read a 32-bit data from <add
r>, and write (data ^ bit_err) back to <addr>


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