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Questions about TCP3e

Other Parts Discussed in Thread: TMS320C6670

Hi all,

I'am working with TMS320C6670 and I want to use an TCP3e for encoding LTE data.

After reading the UG for TCP3e everything seems to be similar with VCP2: You need to configure the EDMA3 transfers, prepare the input data and start the co-processor, after that just wait for the last EDMA3 transfer with output data. So as I understand for TCP3e there are 3 mandatory EDMA3 transfers: config for the code block, input data and output data. 

But when I get to the examples from the PDK I come up with a lot of questions, maybe someone could clarify some of them or point me to the explicit document.

Questions I have:

1) "With Sync Buffer", "Pair-wise", "Without sync Buffer" these are the chaining modes as I understand? What are the difference between them?

2) Why there are 7 EDMA transfers? WEVT EDMAREVT EDMA is input and output data as I understand, but what the SYNC EDMA, TRIG SYNC EDMA, Mgz0 EDMA, Mgz1 EDMA and Queue EDMA stand for?

3) Why we are using QMSS for data if we have the EDMA3? Is there a job that EDMA3 can't handle? This is all that I can get from the code : "By default, we use the Qmss API to get the address."

4) At the end of the testing application all three methods show Effective Throughput about 6.4438 Mbps, which is not so good for LTE, is there any chances to get higher speed?

5) In our application we also using a VCP2 for the decoding Wi-Fi signal field and there CSL EDMA3 functions are used instead of the EDMA3 driver. Could it cause some troubles in the future if we implement the TCp3e like in example?

6) As I understood from the comments only TC0 can be used for the correct TCP3e driver work, other just fails.

7) is the L2 cache disabling mandatory actions or not?

Sorry for a lot of questions, but I just can't get clear answers for that anywhere.

Best regards, Pavlo!

  • Hi,

    Thanks for your post.

    May be, I could address Q#3, The QMSS is a centralized hardware unit that monitors core activity and manages the queues, but EDMA would be used to transfer data across peripherals or system masters without CPU intervention. Also, multiple packet DMA (PKTDMA) engines use descriptors between transmit and receive queues packets that are dedicated to “routing” peripherals or to the multicore navigator  infrastructure.

    There are queues for generic use and queues with specific use cases.

    This is documented in KeyStone Architecture Multicore Navigator User Guide SPRUGR9H, Section 5.1.

    http://www.ti.com/.../sprugr9

    To address Q#2, you could refer keystone EDMA3 user guide as below:

    http://www.ti.com/lit/ug/sprugs5b/sprugs5b.pdf

    Thanks & regards,

    Sivaraj K

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  • Hi ,

    Thank you for your interest in the topic. About Q#3 I understand what QMSS is. But As I saw in the example it used only for retrieving the address with Qmss_getQueuePushHandle() API. And since this function returns the address in the QMSS Data field (0x02A2), workaround was created to the QMSS Config field (0x3402). So this part is hard for my understanding either, why the address in the data field was not good enough?

    Concerning Q#2. Yet again I know that the EDMA3 transfer is. I want to clarify why we are creating 7 transfers instead of the 3 mandatory described in the TCP3E UG. Two of that transfers devoted to the Magazines 0 and 1. But what they are I don't know, yet again not described.

    Maybe there are some additional documents, some TI wiki page or doxygen files.

    Best Regards,
    Pavlo!
  • Hi Pavlo,

    Q1: Have you taken a look at the tcp3e software design specification document under tcp3e\docs folder? It explains all the 3 modes and the need for it.

    Q2. The additional channels are for pipelining ping pong purposes where these channels (magazines) are loading while the tcp3e is working on the other channel. Again, details are provided in the SDS document.

    Q3. QMSS was chosen for multicore synchronization purposes. while the tcp3e driver is running on core 0, requests can come in from other cores and this is handled by QMSS. It is a wrapper around the EDMA operation.

    Q4. That doesn't look right. What code block size are you testing? What mcount value are you setting? The throughput results for tcp3e are shown here for LTE:

    www.ti.com/.../sprabk5a.pdf

    Q5. There should not be any issue using VCP2 with CSL EDMA calls and EDMA3 driver for TCP3e as long as there is no contention in the EDMA channels being used.

    Q6. EDMA Channel Controller 2(EDMACC2) has read/write privileges to TCP3e for TC0, TC1 and TC3. Any of these transfer controllers should work. Make sure that the sampleInstInitConfig configuration in the sample_tci6498_cfg.c file is updated to support the EDMA REVT and WEVT access to these TCs.
    See EDMA Instance 2,TC0 for reference in the sampleInstInitConfig strcuture.

    Q7. Cache can be enabled but care has to be taken for each TB such that there are writebacks and invalidates. I believe cache is disabled in this particular example.

    Regards,
    Arun

  • Hi, Arun,

    Thank you for your interest in this topic and your answers. Most of them answer my questions.

    Just for clarification:

    "tcp3e\docs folder" you mean the doxygen documents? If so they only provide the info about specific functions, but not the plot of the application. But I will look there again. Also {PDK_INSTALL_PATH}\packages\ti\drv\tcp3e\docs is that correct path to this document? 

    About throughput I am using the example setup and blocks. The length is different in the example. Location of that test blocks and configs is {PDK_INSTALL_PATH}\packages\ti\drv\tcp3e\example\testvectors\test_example.

    Sorry for some late response, didn't have opportunity to get to the office.

    Best Regards,

    Pavlo!

  • Hi,

    I expected the docs folder to contain the tcp3e software design specification pdf. It is provided as part of the PDK. I am surprised it is not available. I am attaching it here for reference.

    Regards,

    ArunTCP3e_DriverSDS.pdf

  • Hi, Arun,

    Thank you for your help, hope this document will answer to all of m questions and clarify the situation with the driver functions.

    Best Regards,

    Pavlo!