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AM3352 IO SET violation

Miroslav Bozic
Intellectual 420 points

Hi,

I'm working on custom board based on AM3352ZCE embedded processor. The MCASP module is required together with MII LAN controller. Because of that I decide to use next pins for MCASP0.

ACLKX -  V4

AXR0 - U5

AXR1 - W6

fsx - W4

AHCLKR - V5

Instead of pin V5 all pins can be used together. For AHCLKR (V5) I'm getting violation that V5 isn't valid for MCASP0_IOSET_8. Because MII use pins that can be alternative for MCASP I can't use them and I must use pins I explain above. Is it possible to use this configuration while violation is present, and what is purpose of IOSETs because I didn't find anything about that in datasheet or technical reference manual.

Best regards.

  • 0
    TI__Guru 64045 points
    First paragraph of Peripheral Information and Timings section of the AM335x Data Sheet.

    The AM335x device contains many peripheral interfaces. In order to reduce package size and lower overall system cost while maintaining maximum functionality, many of the AM335x terminals can multiplex up to eight signal functions. Although there are many combinations of pin multiplexing that are possible,only a certain number of sets, called IO Sets, are valid due to timing limitations. These valid IO Sets were carefully chosen to provide many possible application scenarios for the user.

    Texas Instruments has developed a Windows-based application called Pin Mux Utility that helps a system designer select the appropriate pin-multiplexing configuration for their AM335x-based product design. The Pin Mux Utility provides a way to select valid IO Sets of specific peripheral interfaces to ensure the pinmultiplexing configuration selected for a design only uses valid IO Sets supported by the AM335x device.

    Regards,
    Paul