I'm trying to convert one of the CSL examples to copy from flash with EDMA3 in ab sync mode. If I understand correctly, the A and B count should allow me to copy 2 megabytes. For one of the CSL examples, it copies the first 32k, then stops. I converted the project to operate on big endian, moved the src arrays to point to flash, and the destination arrays to DDR2 memory. Cacheing is disabled for my initial implementation, to reduce my problem space. The CSL examples I've tried are edma_self-chain, and edma_interrupt. QDMA would be fine too, as long as the solution is non-complicated.
If the flash is in 8-bit mode, does the size of the transfer for the options parameter need to be 8 bits? Also, then, the ab count would be 0x0031_FFFF as there are 32 64KB transfers, or 32 arrays of 64k bytes.
Any suggestions on what I might be not setting correctly for my transfer to work?
Thanks,
Processor: C64+. Transfer size =~ 2 megabytes. CCS 5.x,
EDMA 3 used