snd_soc_write with multiple pages and register cache

Other Parts Discussed in Thread: AM3352

Dear support,

    I have a aic32x4 codec for an am3352 based custom board. The aic32x4 registers are allocated on multiple pages.

So I have the following structure:

static const struct regmap_range_cfg aic32x4_regmap_pages[] = {
	{
		.selector_reg = 0,
		.selector_mask  = 0xff,
		.window_start = 0,
		.window_len = 128,
		.range_min = 0,
		.range_max = AIC32X4_RMICPGAVOL,
	},
};

static const struct regmap_config aic3254_regmap = {
	.reg_bits = 8,
	.val_bits = 8,

	.max_register = AIC32X4_RMICPGAVOL,
	.ranges = aic32x4_regmap_pages, 
	.num_ranges = ARRAY_SIZE(aic32x4_regmap_pages), 
	
};

So that when i call snd_soc_write(...) with register address greater or equal to 128 (lower than 256) I should write on page 1.

But in my case it seems that the registers on page 1 ore not written (I try with a read and write operation on a RW reg value).

I suppose there some issue on the multiple page setup maybe related to the reg cache.

It seems correct to me to set:

 ret = snd_soc_codec_set_cache_io(codec, 8, 8, SND_SOC_I2C);

but I found that with

ret = snd_soc_codec_set_cache_io(codec, 8, 8, SND_SOC_REGMAP);

i can write correctly on page 1.

In particular the affect of the command above (snd_soc_codec_set_cache_io) is not perfectly clear to me. Moreover if I remove that line the linux boot crash.

Thank you.