This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

Why is DM8127/DM8148 always in RESET, i.e., RSTOUTn_WD_OUTn is always asserted (always 0)

Hi, all

The hardware is designed by myself, but the powering parts are copied from taht of APPRO-IPNC.

And i haved measured the output TPS659113, the results are qualified in both timing and rating

And, i verified the following conditions:

1、The powering up sequence is correct, i have measured the sequence pairwise~~

2、The voltage ratings  are correct (1.2V  1.5V   1.8V   3.3V are all present)~~~

3、The crystal are working in a correct way (i have measured the waves, both are correct (20MHz & 22.5792MHz))

Nevertheless, i found that, RSTOUTn_WD_OUTn is always 0 (Logic Low) while POR is already deasserted from the state " POR = '0' ".

can anyone explain why should this happen