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Using EMIF interface in Linux

Hi,

I am learning the EMIF interface,after reading the MCSDK user guide and files,

I got this information so far:

driver is implemented in drivers/memory/davinci-aemif.c.

The binding definitions are given in Documentation/devicetree/bindings/memory/davinci-aemif.txt.

This driver allows configuration of the AEMIF bus connected to slave devices such as NAND.

The bindings exposes the timing parameters required for the slave device.

 

Unlike the SPI driver,

I can't find 'EMIF' in  /dev/, and don't know how to operate it,

 

If I want to add a sram device to the EMIF,

Should I just add the sram information in bindings(davinci-aemif.txt) and compile the kernel?

Any help on this will be appreciated.

Regards,

Kevin

  • Hi Kevin,
    You won't find any device entry for EMIF peripheral since its used to memory device.
    If you want to add SRAM then you have to initialize the EMIF with CS connected and SRAM timing parameters.
    After that you can access the SRAM memory.
  • Hi Titus S,


    Thanks for you reply!


    The Hardware is EVM2E,and assume CS1 /CE3 will be used for the SRAM.

    After connecting the hardware pins for SRAM,

    Could you give some more details about what should be changed in software side?


    Regards,

    kevin
  • Hi

    kevin said:
    If I want to add a sram device to the EMIF,

    Should I just add the sram information in bindings(davinci-aemif.txt) and compile the kernel?

    Any help on this will be appreciated.

    On the software side, two things are required.

    1. Modify the dts file.

    2. Enable the sram driver using "make menuconfig"

    1. Modify the dts file.

    Go to k2hk-evm.dts located at arch/arm/boot/dts/ and modify like below referring to the XTCIEVMK2X_Technical_Reference_Manual_Rev1_0.pdf

    Example:

    aemif@30000000 {

    sram: cs5@0x3C000000 {

          compatible = "mmio-sram";

          reg = <0x3C000000 0x40000>; /* 256 KiB SRAM at address 0x3C000000 */

    };

    .......... // for other NAND/NOR e.t.c

    ...........

    }

    2. Enable the sram driver using "make menuconfig"

    linux-keystone#make menuconfig 

    -->Device drivers -->Misc devices --> Generic on-chip SRAM driver

    --------

  • Hi Shankari,

    Thanks a lot for your answers, it's very helpful.

    Regards,
    kevin
  • Hello,

    I am trying to do the same. I have now rebuilt the kernel with the EMIF SRAM driver enabled and just got my test code compiled.

    I am using linaro-arm-linux-gnueabihf-4.8 compiler.

    Now I am facing a problem how to link the driver into my code.

    Including the driver functions seem to succeed like this:

    #include <linux/platform_data/mtd-davinci-aemif.h>

    but then the linking fails, of course. The driver function cannot be found.

    This is just natural since I have not added its code into my project because it must come from the kernel driver.

    My questions:

    1. What is the correct way to include the driver header so that the driver library also links? I mean what should I type into the #include statement.

    2. Where can I find the library (.a file?) and the corresponding shared object (.so file?). I guess there must be such files.

    The library file (.a) should exist in my PC somewhere, because it is needed for building the software.

    But the .so is necessary to exist only in the target machine (EVM board), right?

    Best regards,

    Ari

  • Do you want to access this EMIF driver in user space ?

    We don't have such a libraries .a or .so etc.,

    You can configure the memory through this driver and get the memory for accessing, I think you can simply use "/dev/mem" for access the memory.

    www.kernel.org/.../ti-aemif.txt

    git.ti.com/.../davinci-aemif.c

    Able to enable the driver and got the successful initializing logs in your kernel bootup log ?
  • Hello Titus!

    Yes, I want to call this driver from the user space. I mean I launch my test program from the ARM-Linux terminal like:

    ./testEmif

    The problem is that the system does not let me read/write directly into the EMIF16 register addresses and I get a segmentation fault every time I try it. I have done memory mapping by calling mmap() function which removes the segmentation fault, but I still cannot see anything to happen in the EMIF bus with an oscilloscope.

    With the mmap() function I use the "/dev/mem".

    I found some test code which does basicly the same I have been trying. It configures the EMIF CS1 into the address base of 0x34000000 and reads the data from the addresses at 0x74000000.
    I am using the K2H EVM. Are these addresses right for the CS 1? I have understood the NAND is connected into the CS 0.

    - Ari

  • Hello Titus!

    I found a wonderful tool "mem_util". With that I can test my EMIF bus.

    I should be able to see from the mem_util's source codes how to do it right in the user space.

    I retried with a better oscilloscope and finally saw the CS pulse there. Also the read pulses existed as well. I am now adjusting the timing settings.

    Thanks anyway for your help!

    Best regards,

    Ari

  • Hi Ari,
    Thank you for the update. The mem_util source will help to understand the user space api's and programming.