BeagleBone black MMC3 ---> wl12xx

Dileep D R

Other Parts Discussed in Thread: WL1271, CSD, TPS65217

Hi,

Interfacing wl12xx with MMC3 on Beaglebone black. Below are my configuration & dmesg snap. Please let me know whether there is a hardware issue or device tree configuration issue.

    wlan_en_reg: fixedregulator@3 {
       compatible = "regulator-fixed";
       regulator-name = "wlan-en-regulator";
       regulator-min-microvolt = <1800000>;
       regulator-max-microvolt = <1800000>;

       /* WL_EN */
       gpio = <&gpio0 27 0>;
       enable-active-high;
   };

    wlan_pins_default: pinmux_wlan_pins_default {
       pinctrl-single,pins = <
           0x28 (PIN_INPUT_PULLUP | MUX_MODE7)   /* gpio0_26 WL_IRQ */
           0x2c (PIN_OUTPUT_PULLUP | MUX_MODE7) /* gpio0_27 WL_EN */
       >;
   };

   /* ODIN-W160 SDIO pins */
   mmc3_pins: pinmux_mmc3_pins {
       pinctrl-single,pins = <
           0x3C (PIN_INPUT_PULLUP | MUX_MODE3) /* mmc2_dat3 */
           0x38 (PIN_INPUT_PULLUP | MUX_MODE3) /* mmc2_dat2 */
           0x34 (PIN_INPUT_PULLUP | MUX_MODE3) /* mmc2_dat1 */
           0x30 (PIN_INPUT_PULLUP | MUX_MODE3) /* mmc2_dat0 */
           0x8c (PIN_INPUT_PULLUP | MUX_MODE3) /* mmc2_clk */
           0x88 (PIN_INPUT_PULLUP | MUX_MODE3) /* mmc2_cmd */
       >;
   };

&mmc3 {
   /* these are on the crossbar and are outlined in the
       xbar-event-map element */
    dmas = <&edma 32 &edma 33>;
    dma-names = "tx", "rx";

    status = "okay";
    vmmc-supply = <&wlan_en_reg>;
    ti,non-removable;
    bus-width = <4>;
    ti,needs-special-hs-handling;
    cap-power-off-card;
    keep-power-in-suspend;
    pinctrl-names = "default";
    pinctrl-0 = <&mmc3_pins &wlan_pins_default>;

    #address-cells = <1>;
    #size-cells = <0>;
    wlcore: wlcore@3 {
        compatible = "ti,wl1271";
        reg = <2>;
        interrupt-parent = <&gpio0>;
        interrupts = <26 0x4>;
        ref-clock-frequency = <25000000>;
    };
};

dmesg log:

[    4.223375] i2c /dev entries driver
[    4.228992] omap_wdt: OMAP Watchdog Timer Rev 0x01: initial timeout 60 sec
[    4.236949] omap_hsmmc 48060000.mmc: Got CD GPIO
[    4.250111] mmc0: clock 0Hz busmode 2 powermode 1 cs 0 Vdd 21 width 0 timing 0
[    4.268669] mmc0: clock 400000Hz busmode 2 powermode 2 cs 0 Vdd 21 width 0 timing 0
[    4.290159] mmc1: clock 0Hz busmode 2 powermode 1 cs 0 Vdd 7 width 0 timing 0
[    4.298270] mmc0: clock 400000Hz busmode 2 powermode 2 cs 1 Vdd 21 width 0 timing 0
[    4.308205] mmc0: clock 400000Hz busmode 2 powermode 2 cs 0 Vdd 21 width 0 timing 0
[    4.315938] mmc1: clock 400000Hz busmode 2 powermode 2 cs 0 Vdd 7 width 0 timing 0
[    4.324898]
[    4.324898] ************ mmc_attach_sdio ************
[    4.333652] mmc0: clock 400000Hz busmode 2 powermode 2 cs 1 Vdd 21 width 0 timing 0
[    4.342940] ledtrig-cpu: registered to indicate activity on CPUs
[    4.351338] mmc0: clock 400000Hz busmode 2 powermode 2 cs 0 Vdd 21 width 0 timing 0
[    4.359361] omap-aes 53500000.aes: OMAP AES hw accel rev: 3.2
[    4.368286] omap-sham 53100000.sham: hw accel on OMAP rev 4.3
[    4.375931] hidraw: raw HID events driver (C) Jiri Kosina
[    4.382822] usbcore: registered new interface driver usbhid
[    4.388432] usbhid: USB HID core driver
[    4.392877] ashmem: initialized
[    4.397042] remoteproc0: wkup_m3 is available
[    4.401786] remoteproc0: Note: remoteproc is still under development and considered experimental.
[    4.410910] remoteproc0: THE BINARY FORMAT IS NOT YET FINALIZED, and backward compatibility isn't yet guaranteed.
[    4.425685] oprofile: using arm/armv7
[    4.430151] NET: Registered protocol family 10
[    4.434702] mmc0: host does not support reading read-only switch, assuming write-enable
[    4.444303] mip6: Mobile IPv6
[    4.447317] NET: Registered protocol family 17
[    4.451962] mmc0: clock 25000000Hz busmode 2 powermode 2 cs 0 Vdd 21 width 0 timing 0
[    4.460006] Key type dns_resolver registered
[    4.464302] mpls_gso: MPLS GSO support
[    4.468296] omap_voltage_late_init: Voltage driver support not added
[    4.474865] mmc0: clock 25000000Hz busmode 2 powermode 2 cs 0 Vdd 21 width 2 timing 0
[    4.483303] cpu cpu0: of_pm_voltdm_notifier_register: Failed to get cpu0 regulator/voltdm: -517
[    4.492161] mmc0: new SDHC card at address e624
[    4.497220] cpu cpu0: cpu0 clock notifier not ready, retry
[    4.503085] mmcblk0: mmc0:e624 SU04G 3.69 GiB
[    4.508367] ThumbEE CPU extension supported.
[    4.513208] Registering SWP/SWPB emulation handler
[    4.518201] mmcblk0: p1 p2
[    4.523799] registered taskstats version 1
[    4.528412] mmc1: clock 400000Hz busmode 2 powermode 2 cs 1 Vdd 7 width 0 timing 0
[    4.537029] Btrfs loaded
[    4.542283] mmc1: clock 400000Hz busmode 2 powermode 2 cs 0 Vdd 7 width 0 timing 0
[    4.552326]
[    4.552326] ************ mmc_attach_sdio ************
[    4.559820]
[    4.559820] ************ mmc_attach_sdio 1 ************
[    4.566664] omap_hsmmc 47810000.mmc: card claims to support voltages below defined range
[    4.575096] Key type encrypted registered
[    4.582426]
[    4.582426] ************ mmc_attach_sdio 2 ************
[    4.589445] [HSB]: hostcaps = 2707 ocr = 80
[    4.593648] [HSB]: Sending the operation code ocr = 80 .
[    4.599583] [HSB]: ocr = 80 rocr = a0ffffc0 .
[    4.604097] [HSB]: Its SDIO interface Card attached
[    4.609324] [HSB]: Init_card is done..
[    4.613164]
[    4.613164] ************ Test_1 ************
[    4.619193] [HSB]: No support of 1.8 Volt
[    4.623626]
************Test 2 rocr=-1593835584,ocr=128 ************
,[HSB]: Send the Relative Address for the Card = 0
[    4.635633] [HSB]: Relative Address for the Card = 1
[    4.640916]
[    4.640916] ************Test 2_0 sdio_read_cccr:ocr=128 ************
[    4.649153] [HSB]: Get CSD of card
[    4.653090] [HSB]: Select Card Success quirks = 0
[    4.658921] [HSB]: Read the CCR Register CCCR = 80
[    4.663782] [HSB]: CCR vsn= 1 multi_block = 1 low_speed =0 wide_bus = 0 high_power = 0 ,high_speed = 0 disable_cd = 0
[    4.674884]
[    4.674884] ************Test 2 sdio_read_cccr:ocr=128 ************
[    4.686668] tps65217 0-0024: TPS65217 ID 0xe version 1.2
[    4.692835] at24 0-0050: 32768 byte 24c256 EEPROM, writable, 1 bytes/write
[    4.699892] omap_i2c 44e0b000.i2c: bus 0 rev0.11 at 400 kHz
[    4.707174] i2c i2c-1: of_i2c: modalias failure on /ocp/i2c@4802a000/tps1@24
[    4.714723] [HSB]: Read the CIS Success
[    4.718982] at24 1-0050: 32768 byte 24c256 EEPROM, writable, 1 bytes/write
[    4.725937] omap_i2c 4802a000.i2c: bus 1 rev0.11 at 400 kHz
[    4.731593]
[    4.731593] ************Test 2_1 sdio_read_cccr:ocr=128 ************
[    4.739582]
[    4.739582] ************Test 2_3 sdio_read_cccr:ocr=128 ************
[    4.749500] at24 2-0054: 32768 byte 24c256 EEPROM, writable, 1 bytes/write
[    4.756861] at24 2-0055: 32768 byte 24c256 EEPROM, writable, 1 bytes/write
[    4.764235] [HSB]: Disbavle the CD
[    4.767657] [HSB]: Enable the Card to High speed
[    4.772632] at24 2-0056: 32768 byte 24c256 EEPROM, writable, 1 bytes/write
[    4.779585]
************Test 3 sdio_enable_hs err =0 : 25000000 ************
,mmc1: clock 25000000Hz busmode 2 powermode 2 cs 0 Vdd 7 width 0 timing 0
[    4.794046] at24 2-0057: 32768 byte 24c256 EEPROM, writable, 1 bytes/write
[    4.801428] at24 2-005d: 8192 byte 24c64 EEPROM, writable, 32 bytes/write
[    4.808665] [HSB]: Set the Speed or clock to= 25000000
[    4.814004] [HSB]: Enable the 4 Bit mode communication = 2
[    4.820515]
[    4.820515] ************ sdio_enable_4bit_bus card->type=2 ************
[    4.828913] [HSB]: Write Failed CCR reg ctrl= 82 ret = ffffffac
[    4.834950]
[    4.834950] ************ sdio_enable_4bit_bus err_2 : -84 ************
[    4.843268]
************Test 3_1 Enable 4bit err =-84 ************
,[HSB]: Error to remove the card
[    4.853496] [HSB]: Error
[    4.856299]
[    4.856299] ************ mmc_attach_sdio 9 ************
[    4.863242] mmc1: error -84 whilst initialising SDIO card
[    4.894629] omap_i2c 4819c000.i2c: bus 2 rev0.11 at 100 kHz
[    4.950805] mmc1: clock 25000000Hz busmode 1 powermode 2 cs 0 Vdd 7 width 0 timing 0
[    4.959046] ocp:backlight supply power not found, using dummy regulator
[    4.965807] pwm-backlight ocp:backlight: unable to request PWM, trying legacy API
[    4.998708] mmc1: clock 0Hz busmode 2 powermode 0 cs 0 Vdd 0 width 0 timing 0
[    5.006919] pwm-backlight ocp:backlight: unable to request legacy PWM
[    5.015086] remoteproc0: powering up wkup_m3
[    5.019650] remoteproc0: Booting fw image am335x-pm-firmware.elf, size 219663
[    5.027209] remoteproc0: remote processor wkup_m3 is now up

over 9 years ago

0 Biser Gatchev-XID over 9 years ago

TI__Guru**** 393215 points

Hi,

I will ask the SW team to check your DTS settings. I suggest you also ask on the WLAN forum: e2e.ti.com/.../307

0 Yordan Kovachev over 9 years ago

TI__Guru**** 161600 points

Hi,

The dts configurations, you've shown seem correct, except for one line. In the wlcore:wlcore@3 node, can you change the interrupts = <26 0x4>; line to interrupts = <26 IRQ_TYPE_LEVEL_HIGH>;

Also from your dmesg, I see that kernel fails to initialize MMC1, not MMC3:
[ 4.863242] mmc1: error -84 whilst initialising SDIO card
Can you attach the full dts file, there probably is some erroneous configuration that prevents the kernel from properly initializing MMC1?

Best Regards,
Yordan

0 Dileep D R over 9 years ago in reply to Yordan Kovachev

Intellectual 620 points

Fullscreen am33xx_dtsi.txt Download

/*
 * Device Tree Source for AM33XX SoC
 *
 * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
 *
 * This file is licensed under the terms of the GNU General Public License
 * version 2.  This program is licensed "as is" without any warranty of any
 * kind, whether express or implied.
 */

#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/pinctrl/am33xx.h>

#include "skeleton.dtsi"

/ {
	compatible = "ti,am33xx";
	interrupt-parent = <&intc>;

	aliases {
		i2c0 = &i2c0;
		i2c1 = &i2c1;
		i2c2 = &i2c2;
		serial0 = &uart0;
		serial1 = &uart1;
		serial2 = &uart2;
		serial3 = &uart3;
		serial4 = &uart4;
		serial5 = &uart5;
		d_can0 = &dcan0;
		d_can1 = &dcan1;
		usb0 = &usb0;
		usb1 = &usb1;
		phy0 = &usb0_phy;
		phy1 = &usb1_phy;
		ethernet0 = &cpsw_emac0;
		ethernet1 = &cpsw_emac1;
	};

	cpus {
		#address-cells = <1>;
		#size-cells = <0>;
		cpu@0 {
			compatible = "arm,cortex-a8";
			device_type = "cpu";
			reg = <0>;

			voltage-tolerance = <2>; /* 2 percentage */

			clocks = <&dpll_mpu_ck>;
			clock-names = "cpu";

			clock-latency = <300000>; /* From omap-cpufreq driver */
		};
	};

	pmu {
		compatible = "arm,cortex-a8-pmu";
		interrupts = <3>;
	};

	/*
	 * The soc node represents the soc top level view. It is used for IPs
	 * that are not memory mapped in the MPU view or for the MPU itself.
	 */
	soc {
		compatible = "ti,omap-infra";
		mpu {
			compatible = "ti,omap3-mpu";
			ti,hwmods = "mpu";
			sram = <&ocmcram>;
		};
	};

	/*
	 * XXX: Use a flat representation of the AM33XX interconnect.
	 * The real AM33XX interconnect network is quite complex. Since
	 * it will not bring real advantage to represent that in DT
	 * for the moment, just use a fake OCP bus entry to represent
	 * the whole bus hierarchy.
	 */
	ocp: ocp {
		compatible = "simple-bus";
		#address-cells = <1>;
		#size-cells = <1>;
		ranges;
		ti,hwmods = "l3_main";

		l4_wkup: l4_wkup@44c00000 {
			compatible = "ti,am3-l4-wkup", "simple-bus";
			#address-cells = <1>;
			#size-cells = <1>;
			ranges = <0 0x44c00000 0x280000>;

			wkup_m3: wkup_m3@100000 {
				compatible = "ti,am3352-wkup-m3";
				reg = <0x100000 0x4000>,
				      <0x180000	0x2000>;
				reg-names = "umem", "dmem";
				ti,hwmods = "wkup_m3";
				ti,pm-firmware = "am335x-pm-firmware.elf";
			};

			prcm: prcm@200000 {
				compatible = "ti,am3-prcm";
				reg = <0x200000 0x4000>;

				prcm_clocks: clocks {
					#address-cells = <1>;
					#size-cells = <0>;
				};

				prcm_clockdomains: clockdomains {
				};
			};

			scm: scm@210000 {
				compatible = "ti,am3-scm", "simple-bus";
				reg = <0x210000 0x2000>;
				#address-cells = <1>;
				#size-cells = <1>;
				ranges = <0 0x210000 0x2000>;

				am33xx_pinmux: pinmux@800 {
					compatible = "pinctrl-single";
					reg = <0x800 0x238>;
					#address-cells = <1>;
					#size-cells = <0>;
					pinctrl-single,register-width = <32>;
					pinctrl-single,function-mask = <0x7f>;
				};

				scm_conf: scm_conf@0 {
					compatible = "syscon";
					reg = <0x0 0x800>;
					#address-cells = <1>;
					#size-cells = <1>;

					scm_clocks: clocks {
						#address-cells = <1>;
						#size-cells = <0>;
					};
				};

				wkup_m3_ipc: wkup_m3_ipc@1324 {
					compatible = "ti,am3352-wkup-m3-ipc";
					reg = <0x1324 0x24>;
					interrupts = <78>;
					ti,rproc = <&wkup_m3>;
					mboxes = <&mailbox &mbox_wkupm3>;
				};

				scm_clockdomains: clockdomains {
				};
			};
		};

		intc: interrupt-controller@48200000 {
			compatible = "ti,am33xx-intc";
			interrupt-controller;
			#interrupt-cells = <1>;
			reg = <0x48200000 0x1000>;
		};

		edma: edma@49000000 {
			compatible = "ti,edma3";
			ti,hwmods = "tpcc", "tptc0", "tptc1", "tptc2";
			reg =	<0x49000000 0x10000>,
				<0x44e10f90 0x40>;
			interrupts = <12 13 14>;
			#dma-cells = <1>;
		};

		emif: emif@4c000000 {
			compatible = "ti,emif-am3352";
			reg =	<0x4C000000 0x1000>;
			sram = <&ocmcram>;
		};

		gpio0: gpio@44e07000 {
			compatible = "ti,omap4-gpio";
			ti,hwmods = "gpio1";
			gpio-controller;
			#gpio-cells = <2>;
			interrupt-controller;
			#interrupt-cells = <2>;
			reg = <0x44e07000 0x1000>;
			interrupts = <96>;
		};

		gpio1: gpio@4804c000 {
			compatible = "ti,omap4-gpio";
			ti,hwmods = "gpio2";
			gpio-controller;
			#gpio-cells = <2>;
			interrupt-controller;
			#interrupt-cells = <2>;
			reg = <0x4804c000 0x1000>;
			interrupts = <98>;
		};

		gpio2: gpio@481ac000 {
			compatible = "ti,omap4-gpio";
			ti,hwmods = "gpio3";
			gpio-controller;
			#gpio-cells = <2>;
			interrupt-controller;
			#interrupt-cells = <2>;
			reg = <0x481ac000 0x1000>;
			interrupts = <32>;
		};

		gpio3: gpio@481ae000 {
			compatible = "ti,omap4-gpio";
			ti,hwmods = "gpio4";
			gpio-controller;
			#gpio-cells = <2>;
			interrupt-controller;
			#interrupt-cells = <2>;
			reg = <0x481ae000 0x1000>;
			interrupts = <62>;
		};

		uart0: serial@44e09000 {
			compatible = "ti,am3352-uart", "ti,omap3-uart";
			ti,hwmods = "uart1";
			clock-frequency = <48000000>;
			reg = <0x44e09000 0x2000>;
			interrupts = <72>;
			status = "disabled";
			dmas = <&edma 26>, <&edma 27>;
			dma-names = "tx", "rx";
		};

		uart1: serial@48022000 {
			compatible = "ti,am3352-uart", "ti,omap3-uart";
			ti,hwmods = "uart2";
			clock-frequency = <48000000>;
			reg = <0x48022000 0x2000>;
			interrupts = <73>;
			status = "disabled";
			dmas = <&edma 28>, <&edma 29>;
			dma-names = "tx", "rx";
		};

		uart2: serial@48024000 {
			compatible = "ti,am3352-uart", "ti,omap3-uart";
			ti,hwmods = "uart3";
			clock-frequency = <48000000>;
			reg = <0x48024000 0x2000>;
			interrupts = <74>;
			status = "disabled";
			dmas = <&edma 30>, <&edma 31>;
			dma-names = "tx", "rx";
		};

		uart3: serial@481a6000 {
			compatible = "ti,am3352-uart", "ti,omap3-uart";
			ti,hwmods = "uart4";
			clock-frequency = <48000000>;
			reg = <0x481a6000 0x2000>;
			interrupts = <44>;
			status = "disabled";
		};

		uart4: serial@481a8000 {
			compatible = "ti,am3352-uart", "ti,omap3-uart";
			ti,hwmods = "uart5";
			clock-frequency = <48000000>;
			reg = <0x481a8000 0x2000>;
			interrupts = <45>;
			status = "disabled";
		};

		uart5: serial@481aa000 {
			compatible = "ti,am3352-uart", "ti,omap3-uart";
			ti,hwmods = "uart6";
			clock-frequency = <48000000>;
			reg = <0x481aa000 0x2000>;
			interrupts = <46>;
			status = "disabled";
		};

		i2c0: i2c@44e0b000 {
			compatible = "ti,omap4-i2c";
			#address-cells = <1>;
			#size-cells = <0>;
			ti,hwmods = "i2c1";
			reg = <0x44e0b000 0x1000>;
			interrupts = <70>;
			status = "disabled";
		};

		i2c1: i2c@4802a000 {
			compatible = "ti,omap4-i2c";
			#address-cells = <1>;
			#size-cells = <0>;
			ti,hwmods = "i2c2";
			reg = <0x4802a000 0x1000>;
			interrupts = <71>;
			status = "disabled";
		};

		i2c2: i2c@4819c000 {
			compatible = "ti,omap4-i2c";
			#address-cells = <1>;
			#size-cells = <0>;
			ti,hwmods = "i2c3";
			reg = <0x4819c000 0x1000>;
			interrupts = <30>;
			status = "disabled";
		};

		mmc1: mmc@48060000 {
			compatible = "ti,omap4-hsmmc";
			ti,hwmods = "mmc1";
			ti,dual-volt;
			ti,needs-special-reset;
			ti,needs-special-hs-handling;
			dmas = <&edma 24
				&edma 25>;
			dma-names = "tx", "rx";
			interrupts = <64>;
			interrupt-parent = <&intc>;
			reg = <0x48060000 0x1000>;
			status = "disabled";
		};

		mmc2: mmc@481d8000 {
			compatible = "ti,omap4-hsmmc";
			ti,hwmods = "mmc2";
			ti,needs-special-reset;
			dmas = <&edma 2
				&edma 3>;
			dma-names = "tx", "rx";
			interrupts = <28>;
			interrupt-parent = <&intc>;
			reg = <0x481d8000 0x1000>;
			status = "disabled";
		};

		mmc3: mmc@47810000 {
			compatible = "ti,omap4-hsmmc";
			ti,hwmods = "mmc3";
			ti,needs-special-reset;
			interrupts = <29>;
			interrupt-parent = <&intc>;
			reg = <0x47810000 0x1000>;
			status = "disabled";
		};

		hwspinlock: spinlock@480ca000 {
			compatible = "ti,omap4-hwspinlock";
			reg = <0x480ca000 0x1000>;
			ti,hwmods = "spinlock";
			#hwlock-cells = <1>;
		};

		wdt2: wdt@44e35000 {
			compatible = "ti,omap3-wdt";
			ti,hwmods = "wd_timer2";
			reg = <0x44e35000 0x1000>;
			interrupts = <91>;
		};

		dcan0: can@481cc000 {
			compatible = "ti,am3352-d_can";
			ti,hwmods = "d_can0";
			reg = <0x481cc000 0x2000>;
			clocks = <&dcan0_fck>;
			clock-names = "fck";
			syscon-raminit = <&scm_conf 0x644 0>;
			interrupts = <52>;
			status = "disabled";
		};

		dcan1: can@481d0000 {
			compatible = "ti,am3352-d_can";
			ti,hwmods = "d_can1";
			reg = <0x481d0000 0x2000>;
			clocks = <&dcan1_fck>;
			clock-names = "fck";
			syscon-raminit = <&scm_conf 0x644 1>;
			interrupts = <55>;
			status = "disabled";
		};

		mailbox: mailbox@480C8000 {
			compatible = "ti,omap4-mailbox";
			reg = <0x480C8000 0x200>;
			interrupts = <77>;
			ti,hwmods = "mailbox";
			#mbox-cells = <1>;
			ti,mbox-num-users = <4>;
			ti,mbox-num-fifos = <8>;
			mbox_wkupm3: wkup_m3 {
				ti,mbox-send-noirq;
				ti,mbox-tx = <0 0 0>;
				ti,mbox-rx = <0 0 3>;
			};
		};

		timer1: timer@44e31000 {
			compatible = "ti,am335x-timer-1ms";
			reg = <0x44e31000 0x400>;
			interrupts = <67>;
			ti,hwmods = "timer1";
			ti,timer-alwon;
		};

		timer2: timer@48040000 {
			compatible = "ti,am335x-timer";
			reg = <0x48040000 0x400>;
			interrupts = <68>;
			ti,hwmods = "timer2";
		};

		timer3: timer@48042000 {
			compatible = "ti,am335x-timer";
			reg = <0x48042000 0x400>;
			interrupts = <69>;
			ti,hwmods = "timer3";
		};

		timer4: timer@48044000 {
			compatible = "ti,am335x-timer";
			reg = <0x48044000 0x400>;
			interrupts = <92>;
			ti,hwmods = "timer4";
			ti,timer-pwm;
		};

		timer5: timer@48046000 {
			compatible = "ti,am335x-timer";
			reg = <0x48046000 0x400>;
			interrupts = <93>;
			ti,hwmods = "timer5";
			ti,timer-pwm;
		};

		timer6: timer@48048000 {
			compatible = "ti,am335x-timer";
			reg = <0x48048000 0x400>;
			interrupts = <94>;
			ti,hwmods = "timer6";
			ti,timer-pwm;
		};

		timer7: timer@4804a000 {
			compatible = "ti,am335x-timer";
			reg = <0x4804a000 0x400>;
			interrupts = <95>;
			ti,hwmods = "timer7";
			ti,timer-pwm;
		};

		pruss: pruss@4a300000 {
			compatible = "ti,pruss-v2";
			ti,hwmods = "pruss";
			ti,deassert-hard-reset = "pruss", "pruss";
			reg = <0x4a300000 0x080000>;
			ti,pintc-offset = <0x20000>;
			interrupt-parent = <&intc>;
			status = "disabled";
			interrupts = <20 21 22 23 24 25 26 27>;
		};

		rtc: rtc@44e3e000 {
			compatible = "ti,am3352-rtc", "ti,da830-rtc";
			reg = <0x44e3e000 0x1000>;
			interrupts = <75
				      76>;
			ti,hwmods = "rtc";
		};

		spi0: spi@48030000 {
			compatible = "ti,omap4-mcspi";
			#address-cells = <1>;
			#size-cells = <0>;
			reg = <0x48030000 0x400>;
			interrupts = <65>;
			ti,spi-num-cs = <2>;
			ti,hwmods = "spi0";
			dmas = <&edma 16
				&edma 17
				&edma 18
				&edma 19>;
			dma-names = "tx0", "rx0", "tx1", "rx1";
			status = "disabled";
		};

		spi1: spi@481a0000 {
			compatible = "ti,omap4-mcspi";
			#address-cells = <1>;
			#size-cells = <0>;
			reg = <0x481a0000 0x400>;
			interrupts = <125>;
			ti,spi-num-cs = <2>;
			ti,hwmods = "spi1";
			dmas = <&edma 42
				&edma 43
				&edma 44
				&edma 45>;
			dma-names = "tx0", "rx0", "tx1", "rx1";
			status = "disabled";
		};

		usb: usb@47400000 {
			compatible = "ti,am33xx-usb";
			reg = <0x47400000 0x1000>;
			ranges;
			#address-cells = <1>;
			#size-cells = <1>;
			ti,hwmods = "usb_otg_hs";
			status = "disabled";

			usb_ctrl_mod: control@44e10620 {
				compatible = "ti,am335x-usb-ctrl-module";
				reg = <0x44e10620 0x10
					0x44e10648 0x4>;
				reg-names = "phy_ctrl", "wakeup";
				status = "disabled";
			};

			usb0_phy: usb-phy@47401300 {
				compatible = "ti,am335x-usb-phy";
				reg = <0x47401300 0x100>;
				reg-names = "phy";
				status = "disabled";
				ti,ctrl_mod = <&usb_ctrl_mod>;
			};

			usb0: usb@47401000 {
				compatible = "ti,musb-am33xx";
				status = "disabled";
				reg = <0x47401400 0x400
					0x47401000 0x200>;
				reg-names = "mc", "control";

				interrupts = <18>;
				interrupt-names = "mc";
				dr_mode = "otg";
				mentor,multipoint = <1>;
				mentor,num-eps = <16>;
				mentor,ram-bits = <12>;
				mentor,power = <500>;
				phys = <&usb0_phy>;

				dmas = <&cppi41dma  0 0 &cppi41dma  1 0
					&cppi41dma  2 0 &cppi41dma  3 0
					&cppi41dma  4 0 &cppi41dma  5 0
					&cppi41dma  6 0 &cppi41dma  7 0
					&cppi41dma  8 0 &cppi41dma  9 0
					&cppi41dma 10 0 &cppi41dma 11 0
					&cppi41dma 12 0 &cppi41dma 13 0
					&cppi41dma 14 0 &cppi41dma  0 1
					&cppi41dma  1 1 &cppi41dma  2 1
					&cppi41dma  3 1 &cppi41dma  4 1
					&cppi41dma  5 1 &cppi41dma  6 1
					&cppi41dma  7 1 &cppi41dma  8 1
					&cppi41dma  9 1 &cppi41dma 10 1
					&cppi41dma 11 1 &cppi41dma 12 1
					&cppi41dma 13 1 &cppi41dma 14 1>;
				dma-names =
					"rx1", "rx2", "rx3", "rx4", "rx5", "rx6", "rx7",
					"rx8", "rx9", "rx10", "rx11", "rx12", "rx13",
					"rx14", "rx15",
					"tx1", "tx2", "tx3", "tx4", "tx5", "tx6", "tx7",
					"tx8", "tx9", "tx10", "tx11", "tx12", "tx13",
					"tx14", "tx15";
			};

			usb1_phy: usb-phy@47401b00 {
				compatible = "ti,am335x-usb-phy";
				reg = <0x47401b00 0x100>;
				reg-names = "phy";
				status = "disabled";
				ti,ctrl_mod = <&usb_ctrl_mod>;
			};

			usb1: usb@47401800 {
				compatible = "ti,musb-am33xx";
				status = "disabled";
				reg = <0x47401c00 0x400
					0x47401800 0x200>;
				reg-names = "mc", "control";
				interrupts = <19>;
				interrupt-names = "mc";
				dr_mode = "otg";
				mentor,multipoint = <1>;
				mentor,num-eps = <16>;
				mentor,ram-bits = <12>;
				mentor,power = <500>;
				phys = <&usb1_phy>;

				dmas = <&cppi41dma 15 0 &cppi41dma 16 0
					&cppi41dma 17 0 &cppi41dma 18 0
					&cppi41dma 19 0 &cppi41dma 20 0
					&cppi41dma 21 0 &cppi41dma 22 0
					&cppi41dma 23 0 &cppi41dma 24 0
					&cppi41dma 25 0 &cppi41dma 26 0
					&cppi41dma 27 0 &cppi41dma 28 0
					&cppi41dma 29 0 &cppi41dma 15 1
					&cppi41dma 16 1 &cppi41dma 17 1
					&cppi41dma 18 1 &cppi41dma 19 1
					&cppi41dma 20 1 &cppi41dma 21 1
					&cppi41dma 22 1 &cppi41dma 23 1
					&cppi41dma 24 1 &cppi41dma 25 1
					&cppi41dma 26 1 &cppi41dma 27 1
					&cppi41dma 28 1 &cppi41dma 29 1>;
				dma-names =
					"rx1", "rx2", "rx3", "rx4", "rx5", "rx6", "rx7",
					"rx8", "rx9", "rx10", "rx11", "rx12", "rx13",
					"rx14", "rx15",
					"tx1", "tx2", "tx3", "tx4", "tx5", "tx6", "tx7",
					"tx8", "tx9", "tx10", "tx11", "tx12", "tx13",
					"tx14", "tx15";
			};

			cppi41dma: dma-controller@47402000 {
				compatible = "ti,am3359-cppi41";
				reg =  <0x47400000 0x1000
					0x47402000 0x1000
					0x47403000 0x1000
					0x47404000 0x4000>;
				reg-names = "glue", "controller", "scheduler", "queuemgr";
				interrupts = <17>;
				interrupt-names = "glue";
				#dma-cells = <2>;
				#dma-channels = <30>;
				#dma-requests = <256>;
				status = "disabled";
			};
		};

		epwmss0: epwmss@48300000 {
			compatible = "ti,am33xx-pwmss";
			reg = <0x48300000 0x10>;
			ti,hwmods = "epwmss0";
			#address-cells = <1>;
			#size-cells = <1>;
			status = "disabled";
			ranges = <0x48300100 0x48300100 0x80   /* ECAP */
				  0x48300180 0x48300180 0x80   /* EQEP */
				  0x48300200 0x48300200 0x80>; /* EHRPWM */

			ecap0: ecap@48300100 {
				compatible = "ti,am33xx-ecap";
				#pwm-cells = <3>;
				reg = <0x48300100 0x80>;
				interrupts = <31>;
				interrupt-names = "ecap0";
				ti,hwmods = "ecap0";
				status = "disabled";
			};

			ehrpwm0: ehrpwm@48300200 {
				compatible = "ti,am33xx-ehrpwm";
				#pwm-cells = <3>;
				reg = <0x48300200 0x80>;
				ti,hwmods = "ehrpwm0";
				status = "disabled";
			};

			eqep0: eqep@0x48300180 {
				compatible = "ti,am33xx-eqep";
				reg = <0x48300180 0x80>;
				interrupt-parent = <&intc>;
				interrupts = <79>;
				ti,hwmods = "eqep0";
				status = "disabled";
			};
		};

		epwmss1: epwmss@48302000 {
			compatible = "ti,am33xx-pwmss";
			reg = <0x48302000 0x10>;
			ti,hwmods = "epwmss1";
			#address-cells = <1>;
			#size-cells = <1>;
			status = "disabled";
			ranges = <0x48302100 0x48302100 0x80   /* ECAP */
				  0x48302180 0x48302180 0x80   /* EQEP */
				  0x48302200 0x48302200 0x80>; /* EHRPWM */

			ecap1: ecap@48302100 {
				compatible = "ti,am33xx-ecap";
				#pwm-cells = <3>;
				reg = <0x48302100 0x80>;
				interrupts = <47>;
				interrupt-names = "ecap1";
				ti,hwmods = "ecap1";
				status = "disabled";
			};

			ehrpwm1: ehrpwm@48302200 {
				compatible = "ti,am33xx-ehrpwm";
				#pwm-cells = <3>;
				reg = <0x48302200 0x80>;
				ti,hwmods = "ehrpwm1";
				status = "disabled";
			};

			eqep1: eqep@0x48302180 {
				compatible = "ti,am33xx-eqep";
				reg = <0x48302180 0x80>;
				interrupt-parent = <&intc>;
				interrupts = <88>;
				ti,hwmods = "eqep1";
				status = "disabled";
			};
		};

		epwmss2: epwmss@48304000 {
			compatible = "ti,am33xx-pwmss";
			reg = <0x48304000 0x10>;
			ti,hwmods = "epwmss2";
			#address-cells = <1>;
			#size-cells = <1>;
			status = "disabled";
			ranges = <0x48304100 0x48304100 0x80   /* ECAP */
				  0x48304180 0x48304180 0x80   /* EQEP */
				  0x48304200 0x48304200 0x80>; /* EHRPWM */

			ecap2: ecap@48304100 {
				compatible = "ti,am33xx-ecap";
				#pwm-cells = <3>;
				reg = <0x48304100 0x80>;
				interrupts = <61>;
				interrupt-names = "ecap2";
				ti,hwmods = "ecap2";
				status = "disabled";
			};

			ehrpwm2: ehrpwm@48304200 {
				compatible = "ti,am33xx-ehrpwm";
				#pwm-cells = <3>;
				reg = <0x48304200 0x80>;
				ti,hwmods = "ehrpwm2";
				status = "disabled";
			};

			eqep2: eqep@0x48304180 {
				compatible = "ti,am33xx-eqep";
				reg = <0x48304180 0x80>;
				interrupt-parent = <&intc>;
				interrupts = <89>;
				ti,hwmods = "eqep2";
				status = "disabled";
			};
		};

		mac: ethernet@4a100000 {
			compatible = "ti,cpsw";
			ti,hwmods = "cpgmac0";
			clocks = <&cpsw_125mhz_gclk>, <&cpsw_cpts_rft_clk>;
			clock-names = "fck", "cpts";
			cpdma_channels = <8>;
			ale_entries = <1024>;
			bd_ram_size = <0x2000>;
			no_bd_ram = <0>;
			rx_descs = <64>;
			mac_control = <0x20>;
			slaves = <2>;
			active_slave = <0>;
			cpts_clock_mult = <0x80000000>;
			cpts_clock_shift = <29>;
			reg = <0x4a100000 0x800
			       0x4a101200 0x100>;
			#address-cells = <1>;
			#size-cells = <1>;
			interrupt-parent = <&intc>;
			/*
			 * c0_rx_thresh_pend
			 * c0_rx_pend
			 * c0_tx_pend
			 * c0_misc_pend
			 */
			interrupts = <40 41 42 43>;
			ranges;
			syscon = <&scm_conf>;
			status = "disabled";

			davinci_mdio: mdio@4a101000 {
				compatible = "ti,davinci_mdio";
				#address-cells = <1>;
				#size-cells = <0>;
				ti,hwmods = "davinci_mdio";
				bus_freq = <1000000>;
				reg = <0x4a101000 0x100>;
				status = "disabled";
			};

			cpsw_emac0: slave@4a100200 {
				/* Filled in by U-Boot */
				mac-address = [ 00 00 00 00 00 00 ];
			};

			cpsw_emac1: slave@4a100300 {
				/* Filled in by U-Boot */
				mac-address = [ 00 00 00 00 00 00 ];
			};

			phy_sel: cpsw-phy-sel@44e10650 {
				compatible = "ti,am3352-cpsw-phy-sel";
				reg= <0x44e10650 0x4>;
				reg-names = "gmii-sel";
			};
		};

		ocmcram: ocmcram@40300000 {
			compatible = "mmio-sram";
			reg = <0x40300000 0x10000>; /* 64k */
			map-exec;
		};

		elm: elm@48080000 {
			compatible = "ti,am3352-elm";
			reg = <0x48080000 0x2000>;
			interrupts = <4>;
			ti,hwmods = "elm";
			status = "disabled";
		};

		lcdc: lcdc@4830e000 {
			compatible = "ti,am33xx-tilcdc";
			reg = <0x4830e000 0x1000>;
			interrupt-parent = <&intc>;
			interrupts = <36>;
			ti,hwmods = "lcdc";
			status = "disabled";
		};

		tscadc: tscadc@44e0d000 {
			compatible = "ti,am3359-tscadc";
			reg = <0x44e0d000 0x1000>;
			interrupt-parent = <&intc>;
			interrupts = <16>;
			ti,hwmods = "adc_tsc";
			status = "disabled";

			tsc {
				compatible = "ti,am3359-tsc";
			};
			am335x_adc: adc {
				#io-channel-cells = <1>;
				compatible = "ti,am3359-adc";
			};
		};

		gpmc: gpmc@50000000 {
			compatible = "ti,am3352-gpmc";
			ti,hwmods = "gpmc";
			ti,no-idle-on-init;
			reg = <0x50000000 0x2000>;
			interrupts = <100>;
			gpmc,num-cs = <7>;
			gpmc,num-waitpins = <2>;
			#address-cells = <2>;
			#size-cells = <1>;
			status = "disabled";
		};

		sham: sham@53100000 {
			compatible = "ti,omap4-sham";
			ti,hwmods = "sham";
			reg = <0x53100000 0x200>;
			interrupts = <109>;
			dmas = <&edma 36>;
			dma-names = "rx";
		};

		aes: aes@53500000 {
			compatible = "ti,omap4-aes";
			ti,hwmods = "aes";
			reg = <0x53500000 0xa0>;
			interrupts = <103>;
			dmas = <&edma 6>,
			       <&edma 5>;
			dma-names = "tx", "rx";
		};

		mcasp0: mcasp@48038000 {
			compatible = "ti,am33xx-mcasp-audio";
			ti,hwmods = "mcasp0";
			reg = <0x48038000 0x2000>,
			      <0x46000000 0x400000>;
			reg-names = "mpu", "dat";
			interrupts = <80>, <81>;
			interrupt-names = "tx", "rx";
			status = "disabled";
			dmas = <&edma 8>,
				<&edma 9>;
			dma-names = "tx", "rx";
		};

		mcasp1: mcasp@4803C000 {
			compatible = "ti,am33xx-mcasp-audio";
			ti,hwmods = "mcasp1";
			reg = <0x4803C000 0x2000>,
			      <0x46400000 0x400000>;
			reg-names = "mpu", "dat";
			interrupts = <82>, <83>;
			interrupt-names = "tx", "rx";
			status = "disabled";
			dmas = <&edma 10>,
				<&edma 11>;
			dma-names = "tx", "rx";
		};

		rng: rng@48310000 {
			compatible = "ti,omap4-rng";
			ti,hwmods = "rng";
			reg = <0x48310000 0x2000>;
			interrupts = <111>;
		};

		sgx@0x56000000 {
			compatible = "ti,sgx";
			ti,hwmods = "gfx";
			reg = <0x56000000 0x1000000>;
			interrupts = <37>;
		};
	};
};

/include/ "am33xx-clocks.dtsi"

Fullscreen am335x-bone-common_dtsi.txt Download

/*
 * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 */

/ {
	cpus {
		cpu@0 {
			cpu0-supply = <&dcdc2_reg>;
		};
	};

	memory {
		device_type = "memory";
		reg = <0x80000000 0x10000000>; /* 256 MB */
	};

	leds {
		pinctrl-names = "default";
		pinctrl-0 = <&user_leds_s0>;

		compatible = "gpio-leds";

		led@2 {
			label = "beaglebone:green:usr0";
			gpios = <&gpio1 21 GPIO_ACTIVE_HIGH>;
			linux,default-trigger = "heartbeat";
			default-state = "off";
		};

		led@3 {
			label = "beaglebone:green:usr1";
			gpios = <&gpio1 22 GPIO_ACTIVE_HIGH>;
			linux,default-trigger = "mmc0";
			default-state = "off";
		};

		led@4 {
			label = "beaglebone:green:usr2";
			gpios = <&gpio1 23 GPIO_ACTIVE_HIGH>;
			linux,default-trigger = "cpu0";
			default-state = "off";
		};

		led@5 {
			label = "beaglebone:green:usr3";
			gpios = <&gpio1 24 GPIO_ACTIVE_HIGH>;
			linux,default-trigger = "mmc1";
			default-state = "off";
		};
		
	};

	vmmcsd_fixed: fixedregulator@0 {
		compatible = "regulator-fixed";
		regulator-name = "vmmcsd_fixed";
		regulator-min-microvolt = <3300000>;
		regulator-max-microvolt = <3300000>;
	};

	/* ODIN-W160 WL_EN pin regulator */
//	vwlan_en_reg: regulator-vwlan-en {
//		compatible = "regulator-fixed";
//		regulator-name = "vwlan_en";
//		regulator-min-microvolt = <1800000>;
//		regulator-max-microvolt = <1800000>;
//		gpio = <&gpio0 27 0>;
//		enable-active-high;
//		startup-delay-us = <70000>;
//		pinctrl-names = "default";
//		pinctrl-0 = <&wlan_enable_pins>;
//	};

//	wl12xx_vmmc: fixedregulator@3 {
//		pinctrl-names = "default";
//		pinctrl-0 = <&wl12xx_gpio>;
//		compatible = "regulator-fixed";
//		regulator-name = "wl12xx_vmmc";
//		regulator-min-microvolt = <1800000>;
//		regulator-max-microvolt = <1800000>;
//		gpio = <&gpio0 27 0>;
//		startup-delay-us = <70000>;
//		enable-active-high;
//		vin-supply = <&vmmc2>;
//	};

	wlan_en_reg: fixedregulator@3 {
		compatible = "regulator-fixed";
		regulator-name = "wlan-en-regulator";
		regulator-min-microvolt = <1800000>;
		regulator-max-microvolt = <1800000>;

		/* WL_EN */
		gpio = <&gpio0 27 0>;
		enable-active-high;
	};

//	vbat: fixedregulator@0 {
//		compatible = "regulator-fixed";
//		regulator-name = "vbat";
//		regulator-min-microvolt = <5000000>;
//		regulator-max-microvolt = <5000000>;
//		regulator-boot-on;
//	};


};

&am33xx_pinmux {
	pinctrl-names = "default";
	pinctrl-0 = <&clkout2_pin>;
	//pinctrl-1 = <&wlan_enable_pins>;
	//pinctrl-2 = <&wlan_pins>;

	user_leds_s0: user_leds_s0 {
		pinctrl-single,pins = <
			0x54 (PIN_OUTPUT_PULLDOWN | MUX_MODE7)	/* gpmc_a5.gpio1_21 */
			0x58 (PIN_OUTPUT_PULLUP | MUX_MODE7)	/* gpmc_a6.gpio1_22 */
			0x5c (PIN_OUTPUT_PULLDOWN | MUX_MODE7)	/* gpmc_a7.gpio1_23 */
			0x60 (PIN_OUTPUT_PULLUP | MUX_MODE7)	/* gpmc_a8.gpio1_24 */
		>;
	};

	i2c0_pins: pinmux_i2c0_pins {
		pinctrl-single,pins = <
			0x188 (PIN_INPUT_PULLUP | MUX_MODE0)	/* i2c0_sda.i2c0_sda */
			0x18c (PIN_INPUT_PULLUP | MUX_MODE0)	/* i2c0_scl.i2c0_scl */
		>;
	};

	i2c1_pins: pinmux_i2c1_pins {
		pinctrl-single,pins = <
			0x158 (PIN_INPUT_PULLUP | MUX_MODE2)	/* i2c1_sda.i2c1_sda */
			0x15c (PIN_INPUT_PULLUP | MUX_MODE2)	/* i2c1_scl.i2c1_scl */
		>;
	};

	i2c2_pins: pinmux_i2c2_pins {
		pinctrl-single,pins = <
			0x178 (PIN_INPUT_PULLUP | MUX_MODE3)	/* uart1_ctsn.i2c2_sda */
			0x17c (PIN_INPUT_PULLUP | MUX_MODE3)	/* uart1_rtsn.i2c2_scl */
		>;
	};

	uart0_pins: pinmux_uart0_pins {
		pinctrl-single,pins = <
			0x170 (PIN_INPUT_PULLUP | MUX_MODE0)	/* uart0_rxd.uart0_rxd */
			0x174 (PIN_OUTPUT_PULLDOWN | MUX_MODE0)	/* uart0_txd.uart0_txd */
		>;
	};
    
	uart4_pins: pinmux_uart4_pins {
	        pinctrl-single,pins = <
	            0x70 (PIN_INPUT_PULLUP | MUX_MODE6)    /* uart4_rxd.uart4_rxd */
	            0x74 (PIN_OUTPUT_PULLDOWN | MUX_MODE6)    /* uart4_txd.uart4_txd */
	        >;
	};

	clkout2_pin: pinmux_clkout2_pin {
		pinctrl-single,pins = <
			0x1b4 (PIN_OUTPUT_PULLDOWN | MUX_MODE3)	/* xdma_event_intr1.clkout2 */
		>;
	};

	/* sc16is7xx irq GPIO. */
	sc16is7xx_pins: pinmux_sc16is7xx_pins {
		pinctrl-single,pins = <
			0x90 (PIN_INPUT_PULLUP | MUX_MODE7)	/* gpio2_2 IRQ*/
		>;
	};

	bone_audio_cape_audio_pins: pinmux_bone_audio_cape_audio_pins {
		pinctrl-single,pins = <
			0x1ac (PIN_INPUT_PULLDOWN  | MUX_MODE0)      		/* mclk */
			0x19c (PIN_INPUT_PULLDOWN | MUX_MODE2)			/* ar2  */
			0x194 (PIN_INPUT_PULLDOWN | MUX_MODE0)   		/* fs   */
			0x190 (PIN_INPUT_PULLDOWN | MUX_MODE0)   		/* clk */
			0x198 (PIN_OUTPUT_PULLDOWN  | MUX_MODE0)		/* ar0 */	
		>;
	};

//	wlan_pins: pinmux_wlan_pins {
//		pinctrl-single,pins = <
//			0x28 (PIN_INPUT_PULLUP | MUX_MODE7)	/* gpio0_26 WL_IRQ */
//		>;
//	};

	wlan_pins_default: pinmux_wlan_pins_default {
		pinctrl-single,pins = <
			0x28 (PIN_INPUT_PULLUP | MUX_MODE7)	/* gpio0_26 WL_IRQ */
			0x2c (PIN_OUTPUT_PULLUP | MUX_MODE7) /* gpio0_27 WL_EN */
		>;
	};

	/* ODIN-W160 SDIO pins */
	mmc3_pins: pinmux_mmc3_pins {
		pinctrl-single,pins = <
			0x3C (PIN_INPUT_PULLUP | MUX_MODE3) /* mmc2_dat3 */
			0x38 (PIN_INPUT_PULLUP | MUX_MODE3) /* mmc2_dat2 */
			0x34 (PIN_INPUT_PULLUP | MUX_MODE3) /* mmc2_dat1 */
			0x30 (PIN_INPUT_PULLUP | MUX_MODE3) /* mmc2_dat0 */
			0x8c (PIN_INPUT_PULLUP | MUX_MODE3) /* mmc2_clk */
			0x88 (PIN_INPUT_PULLUP | MUX_MODE3) /* mmc2_cmd */
		>;
	};

	cpsw_default: cpsw_default {
		pinctrl-single,pins = <
			/* Slave 1 */
			0x108 (PIN_INPUT | MUX_MODE0)		/* mii1_col.mii1_col */
			0x10c (PIN_INPUT | MUX_MODE0)		/* mii1_crs.mii1_crs */
			0x110 (PIN_INPUT_PULLUP | MUX_MODE0)	/* mii1_rxerr.mii1_rxerr */
			0x114 (PIN_OUTPUT_PULLDOWN | MUX_MODE0)	/* mii1_txen.mii1_txen */
			0x118 (PIN_INPUT_PULLUP | MUX_MODE0)	/* mii1_rxdv.mii1_rxdv */
			0x11c (PIN_OUTPUT_PULLDOWN | MUX_MODE0)	/* mii1_txd3.mii1_txd3 */
			0x120 (PIN_OUTPUT_PULLDOWN | MUX_MODE0)	/* mii1_txd2.mii1_txd2 */
			0x124 (PIN_OUTPUT_PULLDOWN | MUX_MODE0)	/* mii1_txd1.mii1_txd1 */
			0x128 (PIN_OUTPUT_PULLDOWN | MUX_MODE0)	/* mii1_txd0.mii1_txd0 */
			0x12c (PIN_INPUT_PULLUP | MUX_MODE0)	/* mii1_txclk.mii1_txclk */
			0x130 (PIN_INPUT_PULLUP | MUX_MODE0)	/* mii1_rxclk.mii1_rxclk */
			0x134 (PIN_INPUT_PULLUP | MUX_MODE0)	/* mii1_rxd3.mii1_rxd3 */
			0x138 (PIN_INPUT_PULLUP | MUX_MODE0)	/* mii1_rxd2.mii1_rxd2 */
			0x13c (PIN_INPUT_PULLUP | MUX_MODE0)	/* mii1_rxd1.mii1_rxd1 */
			0x140 (PIN_INPUT_PULLUP | MUX_MODE0)	/* mii1_rxd0.mii1_rxd0 */
		>;
	};

	cpsw_sleep: cpsw_sleep {
		pinctrl-single,pins = <
			/* Slave 1 reset value */
			0x108 (PIN_INPUT_PULLDOWN | MUX_MODE7)
			0x10c (PIN_INPUT_PULLDOWN | MUX_MODE7)
			0x110 (PIN_INPUT_PULLDOWN | MUX_MODE7)
			0x114 (PIN_INPUT_PULLDOWN | MUX_MODE7)
			0x118 (PIN_INPUT_PULLDOWN | MUX_MODE7)
			0x11c (PIN_INPUT_PULLDOWN | MUX_MODE7)
			0x120 (PIN_INPUT_PULLDOWN | MUX_MODE7)
			0x124 (PIN_INPUT_PULLDOWN | MUX_MODE7)
			0x128 (PIN_INPUT_PULLDOWN | MUX_MODE7)
			0x12c (PIN_INPUT_PULLDOWN | MUX_MODE7)
			0x130 (PIN_INPUT_PULLDOWN | MUX_MODE7)
			0x134 (PIN_INPUT_PULLDOWN | MUX_MODE7)
			0x138 (PIN_INPUT_PULLDOWN | MUX_MODE7)
			0x13c (PIN_INPUT_PULLDOWN | MUX_MODE7)
			0x140 (PIN_INPUT_PULLDOWN | MUX_MODE7)
		>;
	};

	davinci_mdio_default: davinci_mdio_default {
		pinctrl-single,pins = <
			/* MDIO */
			0x148 (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0)	/* mdio_data.mdio_data */
			0x14c (PIN_OUTPUT_PULLUP | MUX_MODE0)			/* mdio_clk.mdio_clk */
		>;
	};

	davinci_mdio_sleep: davinci_mdio_sleep {
		pinctrl-single,pins = <
			/* MDIO reset value */
			0x148 (PIN_INPUT_PULLDOWN | MUX_MODE7)
			0x14c (PIN_INPUT_PULLDOWN | MUX_MODE7)
		>;
	};

	mmc1_pins: pinmux_mmc1_pins {
		pinctrl-single,pins = <
			0x160 (PIN_INPUT | MUX_MODE7) /* GPIO0_6 */
		>;
	};

	emmc_pins: pinmux_emmc_pins {
		pinctrl-single,pins = <
			0x80 (PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_csn1.mmc1_clk */
			0x84 (PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_csn2.mmc1_cmd */
			0x00 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad0.mmc1_dat0 */
			0x04 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad1.mmc1_dat1 */
			0x08 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad2.mmc1_dat2 */
			0x0c (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad3.mmc1_dat3 */
			0x10 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad4.mmc1_dat4 */
			0x14 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad5.mmc1_dat5 */
			0x18 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad6.mmc1_dat6 */
			0x1c (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad7.mmc1_dat7 */
		>;
	};

};

&uart0 {
	pinctrl-names = "default";
	pinctrl-0 = <&uart0_pins>;

	status = "okay";
};

&uart4 {
    pinctrl-names = "default";
    pinctrl-0 = <&uart4_pins>;

    status = "okay";
};

&usb {
	status = "okay";
};

&usb_ctrl_mod {
	status = "okay";
};

&usb0_phy {
	status = "okay";
};

&usb1_phy {
	status = "okay";
};

&usb0 {
	status = "okay";
	dr_mode = "peripheral";
};

&usb1 {
	status = "okay";
	dr_mode = "host";
};

&cppi41dma  {
	status = "okay";
};

&i2c0 {
	pinctrl-names = "default";
	pinctrl-0 = <&i2c0_pins>;

	status = "okay";
	clock-frequency = <400000>;

	tps: tps@24 {
		reg = <0x24>;
	};

	baseboard_eeprom: baseboard_eeprom@50 {
		compatible = "at,24c256";
		reg = <0x50>;

		#address-cells = <1>;
		#size-cells = <1>;
		baseboard_data: baseboard_data@0 {
			reg = <0 0x100>;
		};
	};
};

&i2c1 {
	pinctrl-names = "default";
	pinctrl-0 = <&i2c1_pins>;

	status = "okay";
	clock-frequency = <400000>;

	tps1: tps1@24 {
		reg = <0x24>;
	};

	dileep_eeprom: dileep_eeprom@50 {
		compatible = "at,24c256";
		reg = <0x50>;

		#address-cells = <1>;
		#size-cells = <1>;
		dileep_data: dileep_data@0 {
			reg = <0 0x100>;
		};
	};
};

&i2c2 {
	pinctrl-names = "default";
	pinctrl-0 = <&i2c2_pins &sc16is7xx_pins>;

	status = "okay";
	clock-frequency = <100000>;

	cape_eeprom0: cape_eeprom0@54 {
		compatible = "at,24c256";
		reg = <0x54>;
		#address-cells = <1>;
		#size-cells = <1>;
		cape0_data: cape_data@0 {
			reg = <0 0x100>;
		};
	};

	cape_eeprom1: cape_eeprom1@55 {
		compatible = "at,24c256";
		reg = <0x55>;
		#address-cells = <1>;
		#size-cells = <1>;
		cape1_data: cape_data@0 {
			reg = <0 0x100>;
		};
	};

	cape_eeprom2: cape_eeprom2@56 {
		compatible = "at,24c256";
		reg = <0x56>;
		#address-cells = <1>;
		#size-cells = <1>;
		cape2_data: cape_data@0 {
			reg = <0 0x100>;
		};
	};

	cape_eeprom3: cape_eeprom3@57 {
		compatible = "at,24c256";
		reg = <0x57>;
		#address-cells = <1>;
		#size-cells = <1>;
		cape3_data: cape_data@0 {
			reg = <0 0x100>;
		};
	};

	/* ODIN-W160 EEPROM */
	eeprom@5D {
		compatible = "at,24c64";
		reg = <0x5D>;
		pagesize = <32>;
	};

  	sc16is752: sc16is752@4D {  
	    	compatible = "nxp,sc16is752";  
                reg = <0x4D>;  
  		//clocks = <&clks IMX6SL_CLK_I2C3>;  
		clocks = <&klok>;
                interrupt-parent = <&gpio2>;  
                interrupts = <2 0x2>;
		#interrupt-cells = <2>;  
                gpio-controller;  
                #gpio-cells = <2>; 
		#address-cells = <1>;
		#size-cells = <1>;

		klok: klok {
	       		compatible = "fixed-clock";
	               	#clock-cells = <0>;
			reg = <0>;
        	       	clock-frequency = <1843200>;
            	}; 
        };

//	tlv320aic32x4: tlv320aic32x4@18 {
//		compatible = "ti,tlv320aic32x4";
//		reg = <0x18>;
//		status = "okay";

//		clocks = <&mclk>;
//		clock-names = "mclk";

		/* Regulators */
//		AVDD-supply = <&vaux2_reg>;
//		IOVDD-supply = <&vaux2_reg>;
//		DRVDD-supply = <&vaux2_reg>;
//		DVDD-supply = <&vbat>;

//		mclk: mclk {
//	       		compatible = "fixed-clock";
//	               	#clock-cells = <0>;
//			reg = <0>;
  //   	       	clock-frequency = <24000000>;
//            	};
//	};
};

//&mcasp0	{

//	pinctrl-names = "default";
//	pinctrl-0 = <&bone_audio_cape_audio_pins>;

//	status = "okay";

//	op-mode = <0>;          /* MCASP_IIS_MODE */
//	tdm-slots = <2>;
//	num-serializer = <16>;
//	serial-dir = <  /* 0: INACTIVE, 1: TX, 2: RX */
//		1 0 2 0
//		0 0 0 0
//		0 0 0 0
//		0 0 0 0
//	>;
//	tx-num-evt = <1>;
//	rx-num-evt = <1>;
//};

//&mcasp0 {
//		pinctrl-names = "default";
//		pinctrl-0 = <&bone_audio_cape_audio_pins>;

//		status = "okay";

//		op-mode = <0>;          /* MCASP_IIS_MODE */
//		tdm-slots = <2>;
//		/* 4 serializers */
//		serial-dir = <  /* 0: INACTIVE, 1: TX, 2: RX */
//			0 0 1 2
//		>;
//		tx-num-evt = <32>;
//		rx-num-evt = <32>;
//};

/* ODIN-W160 WLAN SDIO */
//&mmc2 {
//	non-removable; /* TI specific feature */
//	bus-width = <4>;
//	cap-power-off-card; /* TI specific feature */
//	vmmc-supply = <&vwlan_en_reg>;
//	pinctrl-names = "default";
//	pinctrl-0 = <&mmc2_pins &wlan_pins>;
//	status = "okay";

//	#address-cells = <1>;
//	#size-cells = <0>;
//	wlcore: wlcore@0 {
//		compatible = "ti,wl1273";
//		reg = <2>;
//		interrupt-parent = <&gpio0>;
//		interrupts = <26 0x4>;
//		ref-clock-frequency = <38400000>;
//	};
//};

&mmc3 {
	/* these are on the crossbar and are outlined in the
		xbar-event-map element */
	dmas = <&edma 32 &edma 33>;
	dma-names = "tx", "rx";

	status = "okay";
	vmmc-supply = <&wlan_en_reg>;
	ti,non-removable;
	bus-width = <4>;
	ti,needs-special-hs-handling;
	cap-power-off-card;
	keep-power-in-suspend;
	pinctrl-names = "default";
	pinctrl-0 = <&mmc3_pins &wlan_pins_default>;

	#address-cells = <1>;
	#size-cells = <0>;
	wlcore: wlcore@3 {
		compatible = "ti,wl1271";
		reg = <2>;
		interrupt-parent = <&gpio0>;
		interrupts = <26 0x4>;
		ref-clock-frequency = <25000000>;
	};
};

&edma {
ti,edma-xbar-event-map = /bits/ 16 <1 32 2 33>;
};

/include/ "tps65217.dtsi"

&tps {
	/*
	 * Configure pmic to enter OFF-state instead of SLEEP-state ("RTC-only
	 * mode") at poweroff.  Most BeagleBone versions do not support RTC-only
	 * mode and risk hardware damage if this mode is entered.
	 *
	 * For details, see linux-omap mailing list May 2015 thread
	 *	[PATCH] ARM: dts: am335x-bone* enable pmic-shutdown-controller
	 * In particular, messages:
	 *	http://www.spinics.net/lists/linux-omap/msg118585.html
	 *	http://www.spinics.net/lists/linux-omap/msg118615.html
	 *
	 * You can override this later with
	 *	&tps {  /delete-property/ ti,pmic-shutdown-controller;  }
	 * if you want to use RTC-only mode and made sure you are not affected
	 * by the hardware problems. (Tip: double-check by performing a current
	 * measurement after shutdown: it should be less than 1 mA.)
	 */
	ti,pmic-shutdown-controller;

	regulators {
		dcdc1_reg: regulator@0 {
			regulator-name = "vdds_dpr";
			regulator-always-on;
		};

		dcdc2_reg: regulator@1 {
			/* VDD_MPU voltage limits 0.95V - 1.26V with +/-4% tolerance */
			regulator-name = "vdd_mpu";
			regulator-min-microvolt = <925000>;
			regulator-max-microvolt = <1325000>;
			regulator-boot-on;
			regulator-always-on;
		};

		dcdc3_reg: regulator@2 {
			/* VDD_CORE voltage limits 0.95V - 1.1V with +/-4% tolerance */
			regulator-name = "vdd_core";
			regulator-min-microvolt = <925000>;
			regulator-max-microvolt = <1150000>;
			regulator-boot-on;
			regulator-always-on;
		};

		ldo1_reg: regulator@3 {
			regulator-name = "vio,vrtc,vdds";
			regulator-always-on;
		};

		ldo2_reg: regulator@4 {
			regulator-name = "vdd_3v3aux";
			regulator-always-on;
		};

		ldo3_reg: regulator@5 {
			regulator-name = "vdd_1v8";
			regulator-always-on;
		};

		ldo4_reg: regulator@6 {
			regulator-name = "vdd_3v3a";
			regulator-always-on;
		};

		vaux2_reg: regulator@7 {
			regulator-name = "iov";
			regulator-always-on;
		};
	
		vmmc2: regulator@8 {
			regulator-name = "wl12xx";
			regulator-boot-on;
			regulator-always-on;
		};
	};
};

&cpsw_emac0 {
	phy_id = <&davinci_mdio>, <0>;
	phy-mode = "mii";
};

&cpsw_emac1 {
	phy_id = <&davinci_mdio>, <1>;
	phy-mode = "mii";
};

&mac {
	pinctrl-names = "default", "sleep";
	pinctrl-0 = <&cpsw_default>;
	pinctrl-1 = <&cpsw_sleep>;
	status = "okay";
};

&davinci_mdio {
	pinctrl-names = "default", "sleep";
	pinctrl-0 = <&davinci_mdio_default>;
	pinctrl-1 = <&davinci_mdio_sleep>;
	status = "okay";
};

&mmc1 {
	status = "okay";
	bus-width = <0x4>;
	pinctrl-names = "default";
	pinctrl-0 = <&mmc1_pins>;
	cd-gpios = <&gpio0 6 GPIO_ACTIVE_HIGH>;
	cd-inverted;
};

&aes {
	status = "okay";
};

&sham {
	status = "okay";
};

&wkup_m3_ipc {
	ti,scale-data-fw = "am335x-bone-scale-data.bin";
};

/* the cape manager */
/ {
	bone_capemgr {
		compatible = "ti,bone-capemgr";
		status = "okay";

		nvmem-cells = <&baseboard_data &cape0_data &cape1_data &cape2_data &cape3_data>;
		nvmem-cell-names = "baseboard", "slot0", "slot1", "slot2", "slot3";
		#slots = <4>;

		/* map board revisions to compatible definitions */
		baseboardmaps {
			baseboard_beaglebone: board@0 {
				board-name = "A335BONE";
				compatible-name = "ti,beaglebone";
			};

			baseboard_beaglebone_black: board@1 {
				board-name = "A335BNLT";
				compatible-name = "ti,beaglebone-black";
			};
		};
	};

//	clk_mcasp0_fixed: clk_mcasp0_fixed {
//	      #clock-cells = <0>;
//	      compatible = "fixed-clock";
//	      clock-frequency = <24576000>;
//	};

//	clk_mcasp0: clk_mcasp0 {
//	      #clock-cells = <0>;
//	      compatible = "gpio-gate-clock";
//	      clocks = <&clk_mcasp0_fixed>;
//	      enable-gpios = <&gpio3 21 0>; /* BeagleBone Black Clk enable on GPIO3_21 */
//	};

//	clk_mclk: clk_mclk {
//       		compatible = "fixed-clock";
//               	#clock-cells = <0>;
//		reg = <0>;
  //     	       	clock-frequency = <24000000>;
//       	};

//	sound {
//		compatible = "ti,da830-iotgw-audio";
//		ti,model = "TI BeagleBone Black";
//		ti,audio-codec = <&tlv320aic32x4>;
//		ti,mcasp-controller = <&mcasp0>;
//		ti,codec-clock-rate = <24000000>;
//		ti,audio-routing =
//			"Headphone Jack",       "HPLOUT",
//			"Headphone Jack",       "HPROUT",
//			"LINE1L",               "Line In",
//			"LINE1R",               "Line In";

//		clock-names = "mclk";
//		clocks = <&clk_mclk>;
//	};

};

0 Yordan Kovachev over 9 years ago in reply to Dileep D R

TI__Guru**** 161600 points

Hi,

I see that you use mmc1 to interface with the emmc. There is the following mistake, that I find at first glance:

&mmc1 {
status = "okay";
bus-width = <0x4>;
pinctrl-names = "default";
pinctrl-0 = <&mmc1_pins>;
cd-gpios = <&gpio0 6 GPIO_ACTIVE_HIGH>;
cd-inverted;
};

you use &mmc1_pins, which contains only the following pinmux settings:
mmc1_pins: pinmux_mmc1_pins {
pinctrl-single,pins = <
0x160 (PIN_INPUT | MUX_MODE7) /* GPIO0_6 */
>;
};
You basically initialize only the gpio0_6, which is used as a CD signal. You are not initializing the MMC_CLK, MMC_CMD & MMC_DAT0-MMC_DAT7 pins.

This is why your kernel cannot initialize MMC1.

Best Regards,
Yordan

Processors

Processors forum

BeagleBone black MMC3 ---> wl12xx