Can't get started with sample SYSBIOS project

Sergey Kolchanov

Other Parts Discussed in Thread: SYSBIOS

Hello.

I have custom board with DSP c6747. Previously I have worked only with 6713 DSK. I just have created project using "SYS/BIOS typical" template. It build without warnings. But when I try to debug I see C674X_0: File Loader: Verification failed: Values at address 0x00000000C0013208 do not match Please verify target memory and memory map. "Hello world" sample without SYS/BIOS works OK. I am using CCS 6. JTAG connection - XDS100v2 USB. Please help to begin.

over 9 years ago

0 Arvind Singh over 9 years ago

Mastermind 6115 points

Hi Sergey,

Welcome to the TI E2E forum. I hope you will find many good answers here and in the TI.com documents and in the TI Wiki Pages (for processor issues). Be sure to search those for helpful information and to browse for the questions others may have asked on similar topics (e2e.ti.com).

Follow TI Wiki pages and SYS/BIOS Training material to get going.

http://processors.wiki.ti.com/index.php/Category:SYSBIOS

http://processors.wiki.ti.com/index.php/Introduction_to_the_TI-RTOS_Kernel_Workshop

0 Titusrathinaraj Stalin over 9 years ago

TI__Guru** 116100 points

Hi,
Are you creating SYSBIOS example for C6747 ?
Can you attach the project ?

0 Sergey Kolchanov over 9 years ago in reply to Titusrathinaraj Stalin

Prodigy 250 points

Hi and thank you for fast reply.

This is link to project I have created. www.evernote.com/.../68cb8c5f0b820a69

0 Titusrathinaraj Stalin over 9 years ago in reply to Sergey Kolchanov

TI__Guru** 116100 points

Hi Sergey,
I'm not able to open that link which you given, getting "secure connection failed".
Can you attach your SYSBIOS project here using "Use rich formatting" option.

0 Sergey Kolchanov over 9 years ago in reply to Titusrathinaraj Stalin

Prodigy 250 points

test_5.zip

I'm sorry. Here you go.

0 Titusrathinaraj Stalin over 9 years ago in reply to Sergey Kolchanov

TI__Guru** 116100 points

Hi,

Can you load the attached *.out code on your board ?

6175.test_5.zip

0 Sergey Kolchanov over 9 years ago in reply to Titusrathinaraj Stalin

Prodigy 250 points

I have tried to load it by replacing .out file from my project debug folder and run debug session. The result still the same.
C674X_0: File Loader: Verification failed: Values at address 0x00000000C0012640 do not match Please verify target memory and memory map.

Am I doing it wrong way?

0 Titusrathinaraj Stalin over 9 years ago in reply to Sergey Kolchanov

TI__Guru** 116100 points

Hi,

I'm able to run the code on OMAPL137 board (C6747 DSP core) so it should work on your board too.

Use the "browse" option and select the .out file where you put while loading the program, don't replace it in debug folder.

0 Sergey Kolchanov over 9 years ago in reply to Titusrathinaraj Stalin

Prodigy 250 points

Thank you for your response.

Yes, I have load program as you say and looks like it works! But I don't understand what is the difference between your program and mine. Please teach me.

0 Titusrathinaraj Stalin over 9 years ago in reply to Sergey Kolchanov

TI__Guru** 116100 points

Hi,
Actually I have modified the code to run on internal RAM.
Its selected to run on SDRAM (EMIFB), you may need to configure the SDRAM properly in gel file.
Did you modify the gel file as per your custom board ?

0 Sergey Kolchanov over 9 years ago in reply to Titusrathinaraj Stalin

Prodigy 250 points

Thank you very much for your help.
No, I didn't. Could use please provide more detailed information about file you have changed and changes you brought?
Also, It would be nice if you provide links to some documentation about RAM configuration and gel files if it exist.
Thank you.

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Can't get started with sample SYSBIOS project