This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

Can we stop uPP CHx_CLOCK when no data is transferred?

Hi.

Please tell me if we can stop uPP CHx_CLOCK from a FPGA to uPP(Receive mode) during the period of no data transfer from the FPGA to uPP.

FPGA --> uPP of C6746 (Receive Mode)

Best regards,
Tsutomu Furuse