Hi.
Please tell me if we can stop uPP CHx_CLOCK from a FPGA to uPP(Receive mode) during the period of no data transfer from the FPGA to uPP.
FPGA --> uPP of C6746 (Receive Mode)
Best regards,
Tsutomu Furuse
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Hi.
Please tell me if we can stop uPP CHx_CLOCK from a FPGA to uPP(Receive mode) during the period of no data transfer from the FPGA to uPP.
FPGA --> uPP of C6746 (Receive Mode)
Best regards,
Tsutomu Furuse