How to assign DMA channel to a specific TCn?

Hello everyone

I have some confusions about how to assign DMA channel to a specific TCn. I found an EDMA initialization code for C6678, but I do not know fully understand what is the reason of doing it. I try to find answer from EDMA Controller User Guide, but I still confused. In E2E Comunity, I found a similar question in this thread, but I still cannot fully understand. 

To initiate the DMA channel, at first, the code program DCHMAP with parameter set number to which the channel maps. To Assign PaRAM for different channels:

for(i=0; i<CSL_EDMA3_TPCC0_NUM_DMACH; i++) 	
	gpEDMA_CC0_regs->TPCC_DCHMAP[i] = i<< CSL_TPCC_TPCC_DCHMAP0_PAENTRY_SHIFT;

for(i=0; i<CSL_EDMA3_TPCC1_NUM_DMACH; i++) 	
	gpEDMA_CC1_regs->TPCC_DCHMAP[i] = i<< CSL_TPCC_TPCC_DCHMAP0_PAENTRY_SHIFT;

for(i=0; i<CSL_EDMA3_TPCC2_NUM_DMACH; i++) 	
	gpEDMA_CC2_regs->TPCC_DCHMAP[i] = i<< CSL_TPCC_TPCC_DCHMAP0_PAENTRY_SHIFT;

Then set up the DMAQNUM to map the event to the respective event queue.

gpEDMA_CC0_regs->TPCC_DMAQNUM[0]= 0x10101010;
gpEDMA_CC0_regs->TPCC_DMAQNUM[1]= 0x10101010;

gpEDMA_CC1_regs->TPCC_DMAQNUM[0]= 0x32103210;
gpEDMA_CC1_regs->TPCC_DMAQNUM[1]= 0x32103210;
gpEDMA_CC1_regs->TPCC_DMAQNUM[2]= 0x32103210;
gpEDMA_CC1_regs->TPCC_DMAQNUM[3]= 0x32103210;
gpEDMA_CC1_regs->TPCC_DMAQNUM[4]= 0x32103210;
gpEDMA_CC1_regs->TPCC_DMAQNUM[5]= 0x32103210;
gpEDMA_CC1_regs->TPCC_DMAQNUM[6]= 0x32103210;
gpEDMA_CC1_regs->TPCC_DMAQNUM[7]= 0x32103210;

gpEDMA_CC2_regs->TPCC_DMAQNUM[0]= 0x32103210;
gpEDMA_CC2_regs->TPCC_DMAQNUM[1]= 0x32103210;
gpEDMA_CC2_regs->TPCC_DMAQNUM[2]= 0x32103210;
gpEDMA_CC2_regs->TPCC_DMAQNUM[3]= 0x32103210;
gpEDMA_CC2_regs->TPCC_DMAQNUM[4]= 0x32103210;
gpEDMA_CC2_regs->TPCC_DMAQNUM[5]= 0x32103210;
gpEDMA_CC2_regs->TPCC_DMAQNUM[6]= 0x32103210;
gpEDMA_CC2_regs->TPCC_DMAQNUM[7]= 0x32103210;

In the above code, it program the DMAQNUM n with 0x10101010 or 0x32103210. I have three questions about the above codes.

1. It turns out EDMA0 only have 2 DMAQNUM registers, EDMA1 and EDMA2 has 8 DMQNUM registers. What does the number of DMAQNUM registers of EDMAn represent for?

2. For the EDMA0, it programs the DMAQNUMn register as 0x10101010. Suppose, I manually trigger the transfer by setting up ESR register. From the below Table 4-7, E9,E11,E13,and E15 are sending/receiving throughTC1, and E0, E2, E4, E6 are sending/receiving from TC0. My question is what about other those unset Events? For example, what happens if I trigger E1 in ESR, which TCn it would use?

3. For DMA channels in each EDMA, do those channels assign to its according number of event by default? For example, Channel 1 is Event 1, Channel 2 is Event 2, and so on.

Thanks!

Xining